def_tristate SPI_PXA2XX && PCI
config SPI_RSPI
---- --- tristate "Renesas RSPI controller"
++++ +++ tristate "Renesas RSPI/QSPI controller"
depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE
help
---- --- SPI driver for Renesas RSPI blocks.
++++ +++ SPI driver for Renesas RSPI and QSPI blocks.
++++ ++
++++++ ++config SPI_QUP
++++++ ++ tristate "Qualcomm SPI controller with QUP interface"
++++++ ++ depends on ARCH_MSM_DT || (ARM && COMPILE_TEST)
++++++ ++ help
++++++ ++ Qualcomm Universal Peripheral (QUP) core is an AHB slave that
++++++ ++ provides a common data path (an output FIFO and an input FIFO)
++++++ ++ for serial peripheral interface (SPI) mini-core. SPI in master
++++++ ++ mode supports up to 50MHz, up to four chip selects, programmable
++++++ ++ data path from 4 bits to 32 bits and numerous protocol variants.
++++++ ++
++++++ ++ This driver can also be built as a module. If so, the module
++++++ ++ will be called spi_qup.
+ +
config SPI_S3C24XX
tristate "Samsung S3C24XX series SPI"
depends on ARCH_S3C24XX
uwire = spi_master_get_devdata(spi->master);
------- if (spi->chip_select > 3) {
------- pr_debug("%s: cs%d?\n", dev_name(&spi->dev), spi->chip_select);
------- status = -ENODEV;
------- goto done;
------- }
-------
- ------- bits = spi->bits_per_word;
- ------- if (t != NULL && t->bits_per_word)
- ------- bits = t->bits_per_word;
- -------
- ------- if (bits > 16) {
- ------- pr_debug("%s: wordsize %d?\n", dev_name(&spi->dev), bits);
- ------- status = -ENODEV;
- ------- goto done;
- ------- }
- ------- ust->bits_per_word = bits;
- -------
/* mode 0..3, clock inverted separately;
* standard nCS signaling;
* don't treat DI=high as "not ready"