drm/amdgpu: enable GFX/UVD/VCE PG for Bristol

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index eff123b5f2e2199b9929af2c2a5aa9d28a3f61f6..343b4b0a009e0ca4d9b4aaf019fc560269559426 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -910,6 +910,9 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
        .get_config_memsize = &vi_get_config_memsize,
 };
 
+#define CZ_REV_BRISTOL(rev)     \
+       ((rev >= 0xC8 && rev <= 0xCE) || (rev >= 0xE1 && rev <= 0xE6))
+
 static int vi_common_early_init(void *handle)
 {
        bool smc_enabled = false;
@@ -1057,7 +1060,7 @@ static int vi_common_early_init(void *handle)
                        AMD_CG_SUPPORT_VCE_MGCG;
                /* rev0 hardware requires workarounds to support PG */
                adev->pg_flags = 0;
-               if (adev->rev_id != 0x00) {
+               if (adev->rev_id != 0x00 || CZ_REV_BRISTOL(adev->pdev->revision)) {
                        adev->pg_flags |=
                                AMD_PG_SUPPORT_GFX_SMG |
                                AMD_PG_SUPPORT_GFX_PIPELINE |