staging: comedi: addi_apci_1564: tidy up apci1564_reset()
authorChase Southwood <chase.southwood@yahoo.com>
Thu, 17 Apr 2014 06:33:03 +0000 (01:33 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 25 Apr 2014 21:07:51 +0000 (14:07 -0700)
The reset function for this driver is a bit of a mess; clean it up to
ensure that it is functioning properly.

Signed-off-by: Chase Southwood <chase.southwood@yahoo.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c

index 4db3bea4e20afff62722edb148c981f5a47fe80d..7976a22ae94dea9586f86234e507e1744a09fdfb 100644 (file)
@@ -21,6 +21,8 @@
  *
  */
 
+#include "../addi_watchdog.h"
+
 #define APCI1564_ADDRESS_RANGE                         128
 
 /* Digital Input IRQ Function Selection */
@@ -581,26 +583,30 @@ static int apci1564_reset(struct comedi_device *dev)
 {
        struct addi_private *devpriv = dev->private;
 
-       /* disable the interrupts */
+       ui_Type = 0;
+
+       /* Disable the input interrupts and reset status register */
        outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);
-       /* Reset the interrupt status register */
        inl(devpriv->i_IobaseAmcc + APCI1564_DI_INT_STATUS_REG);
-       /* Disable the and/or interrupt */
        outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE1_REG);
        outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE2_REG);
-       devpriv->b_DigitalOutputRegister = 0;
-       ui_Type = 0;
-       /* Resets the output channels */
+
+       /* Reset the output channels and disable interrupts */
        outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DO_REG);
-       /* Disables the interrupt. */
        outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DO_INT_CTRL_REG);
-       outl(0x0, devpriv->i_IobaseAmcc + APCI1564_WDOG_RELOAD_REG);
-       outl(0x0, devpriv->i_IobaseAmcc + APCI1564_TIMER_REG);
+
+       /* Reset the watchdog registers */
+       addi_watchdog_reset(devpriv->i_IobaseAmcc + APCI1564_WDOG_REG);
+
+       /* Reset the timer registers */
        outl(0x0, devpriv->i_IobaseAmcc + APCI1564_TIMER_CTRL_REG);
+       outl(0x0, devpriv->i_IobaseAmcc + APCI1564_TIMER_RELOAD_REG);
 
+       /* Reset the counter registers */
        outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
        outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
        outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
        outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
+
        return 0;
 }