powerpc/perf: Support to export MMCRA[TEC*] field to userspace
authorMadhavan Srinivasan <maddy@linux.vnet.ibm.com>
Tue, 11 Apr 2017 01:51:07 +0000 (07:21 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 19 Apr 2017 10:00:22 +0000 (20:00 +1000)
Threshold feature when used with MMCRA [Threshold Event Counter Event],
MMCRA[Threshold Start event] and MMCRA[Threshold End event] will update
MMCRA[Threashold Event Counter Exponent] and MMCRA[Threshold Event
Counter Multiplier] with the corresponding threshold event count values.
Patch to export MMCRA[TECX/TECM] to userspace in 'weight' field of
struct perf_sample_data.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/perf_event_server.h
arch/powerpc/perf/core-book3s.c
arch/powerpc/perf/isa207-common.c
arch/powerpc/perf/isa207-common.h

index 446cdcd9b7f5dd24e3683dec94fb0082792cbcf6..723bf48e7494b5e59af463fbc411ac301b364aac 100644 (file)
@@ -40,6 +40,7 @@ struct power_pmu {
                                u64 alt[]);
        void            (*get_mem_data_src)(union perf_mem_data_src *dsrc,
                                u32 flags, struct pt_regs *regs);
+       void            (*get_mem_weight)(u64 *weight);
        u64             (*bhrb_filter_map)(u64 branch_sample_type);
        void            (*config_bhrb)(u64 pmu_bhrb_filter);
        void            (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
index e241ebebab6f8628d6ca2aa0d90d88055922dd49..6c2d4168daec9a426ff2d9d5fb622fe3338dc836 100644 (file)
@@ -2053,6 +2053,10 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
                                                ppmu->get_mem_data_src)
                        ppmu->get_mem_data_src(&data.data_src, ppmu->flags, regs);
 
+               if (event->attr.sample_type & PERF_SAMPLE_WEIGHT &&
+                                               ppmu->get_mem_weight)
+                       ppmu->get_mem_weight(&data.weight);
+
                if (perf_event_overflow(event, &data, regs))
                        power_pmu_stop(event, 0);
        }
index a8b100ef8e6c2bfb476157fccb9dd3a627d0b782..8125160be7bc34c77e4583296c6d4bc1fafe816c 100644 (file)
@@ -221,6 +221,14 @@ void isa207_get_mem_data_src(union perf_mem_data_src *dsrc, u32 flags,
        }
 }
 
+void isa207_get_mem_weight(u64 *weight)
+{
+       u64 mmcra = mfspr(SPRN_MMCRA);
+       u64 exp = MMCRA_THR_CTR_EXP(mmcra);
+       u64 mantissa = MMCRA_THR_CTR_MANT(mmcra);
+
+       *weight = mantissa << (2 * exp);
+}
 
 int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp)
 {
index f711f337e35836303674c29e86db5144c1c61ea0..8acbe6e802c749ce39101fddf04467a32189c095 100644 (file)
 #define MMCRA_SDAR_MODE_TLB            (1ull << MMCRA_SDAR_MODE_SHIFT)
 #define MMCRA_SDAR_MODE_NO_UPDATES     ~(0x3ull << MMCRA_SDAR_MODE_SHIFT)
 #define MMCRA_IFM_SHIFT                        30
+#define MMCRA_THR_CTR_MANT_SHIFT       19
+#define MMCRA_THR_CTR_MANT_MASK                0x7Ful
+#define MMCRA_THR_CTR_MANT(v)          (((v) >> MMCRA_THR_CTR_MANT_SHIFT) &\
+                                               MMCRA_THR_CTR_MANT_MASK)
+
+#define MMCRA_THR_CTR_EXP_SHIFT                27
+#define MMCRA_THR_CTR_EXP_MASK         0x7ul
+#define MMCRA_THR_CTR_EXP(v)           (((v) >> MMCRA_THR_CTR_EXP_SHIFT) &\
+                                               MMCRA_THR_CTR_EXP_MASK)
 
 /* MMCR1 Threshold Compare bit constant for power9 */
 #define p9_MMCRA_THR_CMP_SHIFT 45
@@ -282,5 +291,6 @@ int isa207_get_alternatives(u64 event, u64 alt[],
                                const unsigned int ev_alt[][MAX_ALT], int size);
 void isa207_get_mem_data_src(union perf_mem_data_src *dsrc, u32 flags,
                                                        struct pt_regs *regs);
+void isa207_get_mem_weight(u64 *weight);
 
 #endif