spi: s3c64xx: Add debug features to check configurations
authorKisang Lee <kisang80.lee@samsung.com>
Thu, 9 Apr 2015 12:00:29 +0000 (21:00 +0900)
committermyung-su.cha <myung-su.cha@samsung.com>
Wed, 9 May 2018 12:14:45 +0000 (21:14 +0900)
This patch enables debug features through the sysfs.

Change-Id: I6fe0a34faf8b279342dd681bf580ef9654441018
Signed-off-by: Kisang Lee <kisang80.lee@samsung.com>
drivers/spi/spi-s3c64xx.c
include/linux/platform_data/spi-s3c64xx.h

index e8c947aa92cd8cfdce8132632824bf17f004c71e..b6e7be0e3cdb37b532406516e5044f83aa8f5bf2 100644 (file)
@@ -40,9 +40,7 @@
 
 #include "../pinctrl/core.h"
 
-#ifdef CONFIG_CPU_IDLE
 static LIST_HEAD(drvdata_list);
-#endif
 
 #define MAX_SPI_PORTS          10
 #define SPI_AUTOSUSPEND_TIMEOUT                (100)
@@ -146,6 +144,8 @@ static LIST_HEAD(drvdata_list);
 #define RXBUSY    (1<<2)
 #define TXBUSY    (1<<3)
 
+#define SPI_DBG_MODE (0x1 << 0)
+
 /**
  * struct s3c64xx_spi_info - SPI Controller hardware info
  * @fifo_lvl_mask: Bit-mask for {TX|RX}_FIFO_LVL bits in SPI_STATUS register.
@@ -168,6 +168,66 @@ struct s3c64xx_spi_port_config {
        bool    clk_from_cmu;
 };
 
+static ssize_t
+spi_dbg_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+       ssize_t ret = 0;
+
+       ret += snprintf(buf + ret, PAGE_SIZE - ret,
+                       "SPI Debug Mode Configuration.\n");
+       ret += snprintf(buf + ret, PAGE_SIZE - ret,
+                       "0 : Change DBG mode.\n");
+       ret += snprintf(buf + ret, PAGE_SIZE - ret,
+                       "1 : Change Normal mode.\n");
+
+       if (ret < PAGE_SIZE - 1) {
+               ret += snprintf(buf+ret, PAGE_SIZE-ret, "\n");
+       } else {
+               buf[PAGE_SIZE-2] = '\n';
+               buf[PAGE_SIZE-1] = '\0';
+               ret = PAGE_SIZE-1;
+       }
+
+       return ret;
+}
+
+static ssize_t
+spi_dbg_store(struct device *dev, struct device_attribute *attr,
+               const char *buf, size_t count)
+{
+       struct spi_master *master = dev_get_drvdata(dev);
+       struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+       struct s3c64xx_spi_info *sci = sdd->cntrlr_info;
+       struct s3c64xx_spi_info *check_sci;
+       int ret, input_cmd;
+
+       ret = sscanf(buf, "%d", &input_cmd);
+
+       list_for_each_entry(check_sci, &drvdata_list, node) {
+               if (check_sci != sci)
+                       continue;
+
+               switch(input_cmd) {
+               case 0:
+                       printk(KERN_ERR "Change SPI%d to Loopback(DBG) mode\n",
+                                               sdd->port_id);
+                       sci->dbg_mode = SPI_DBG_MODE;
+                       break;
+               case 1:
+                       printk(KERN_ERR "Change SPI%d to normal mode\n",
+                                               sdd->port_id);
+                       sci->dbg_mode = 0;
+                       break;
+               default:
+                       printk(KERN_ERR "Wrong Command!(0/1)\n");
+               }
+       }
+
+       return count;
+}
+
+static DEVICE_ATTR(spi_dbg, 0640, spi_dbg_show, spi_dbg_store);
+
 static void s3c64xx_spi_dump_reg(struct s3c64xx_spi_driver_data *sdd)
 {
        void __iomem *regs = sdd->regs;
@@ -841,6 +901,11 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
                val |= S3C64XX_SPI_ENCLK_ENABLE;
                writel(val, regs + S3C64XX_SPI_CLK_CFG);
        }
+
+       if (sci->dbg_mode & SPI_DBG_MODE) {
+               dev_err(&sdd->pdev->dev, "SPI_MODE_%d", sdd->cur_mode & 0x3);
+               dev_err(&sdd->pdev->dev, "BTS : %d", sdd->cur_bpw);
+       }
 }
 
 #define XFER_DMAADDR_INVALID DMA_BIT_MASK(32)
@@ -1274,6 +1339,13 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
        pm_runtime_put_autosuspend(&sdd->pdev->dev);
 #endif
 
+       if (sci->dbg_mode & SPI_DBG_MODE) {
+               dev_err(&spi->dev, "SPI feedback-delay : %d\n", cs->fb_delay);
+               dev_err(&spi->dev, "SPI clock : %u(%lu)\n",
+                               sdd->cur_speed, clk_get_rate(sdd->src_clk));
+               dev_err(&spi->dev, "SPI %s CS mode", cs->cs_mode ? "AUTO" : "MANUAL");
+       }
+
        return 0;
 
 setup_exit:
@@ -1680,9 +1752,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
                goto err3;
        }
 
-#ifdef CONFIG_CPU_IDLE
        list_add_tail(&sci->node, &drvdata_list);
-#endif
 
        sdd->is_probed = 1;
 #ifdef CONFIG_PM_RUNTIME
@@ -1700,6 +1770,11 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
                                        mem_res, (FIFO_LVL_MASK(sdd) >> 1) + 1,
                                        sdd->rx_dma.dmach, sdd->tx_dma.dmach);
 
+       ret = device_create_file(&pdev->dev, &dev_attr_spi_dbg);
+       if (ret < 0)
+               dev_err(&pdev->dev, "failed to create sysfs file.\n");
+       sci->dbg_mode = 0;
+
        return 0;
 
 err3:
index 10faf5bc86cab61dc2307f78866b15b3ace4560f..40a8c15c0ed0899800787eb2bf7f5a062c60ce84 100644 (file)
@@ -85,6 +85,7 @@ struct s3c64xx_spi_info {
        int (*cfg_gpio)(void);
        dma_filter_fn filter;
        enum spi_domain domain;
+       unsigned int dbg_mode;
 };
 
 struct s3c64xx_spi_dma_data {