bindings: i2c: use consistent naming for i2c binding descriptions
authorWolfram Sang <wolfram@the-dreams.de>
Tue, 13 Nov 2012 17:16:43 +0000 (18:16 +0100)
committerGrant Likely <grant.likely@secretlab.ca>
Thu, 15 Nov 2012 15:57:07 +0000 (15:57 +0000)
Filenames of devictree binding documentation seems to be arbitrary and
for me it is unneeded hazzle to find the corresponding documentation for
a specific driver.

Naming the description the same as the driver is a lot easier and makes
sense to me since the driver defines the binding it understands.

Also, remove a reference in one source to the binding documentation, since path
information easily gets stale.

Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
Cc: Rob Herring <robherring2@gmail.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
34 files changed:
Documentation/devicetree/bindings/i2c/arm-versatile.txt [deleted file]
Documentation/devicetree/bindings/i2c/atmel-i2c.txt [deleted file]
Documentation/devicetree/bindings/i2c/cavium-i2c.txt [deleted file]
Documentation/devicetree/bindings/i2c/ce4100-i2c.txt [deleted file]
Documentation/devicetree/bindings/i2c/davinci.txt [deleted file]
Documentation/devicetree/bindings/i2c/fsl-i2c.txt [deleted file]
Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt [deleted file]
Documentation/devicetree/bindings/i2c/gpio-i2c.txt [deleted file]
Documentation/devicetree/bindings/i2c/i2c-at91.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-davinci.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-gpio.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-imx.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-mpc.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-mux.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-nomadik.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-octeon.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-omap.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-pnx.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-pxa-pci-ce4100.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-pxa.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-sirf.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-versatile.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/i2c-xiic.txt [new file with mode: 0644]
Documentation/devicetree/bindings/i2c/mrvl-i2c.txt [deleted file]
Documentation/devicetree/bindings/i2c/mux.txt [deleted file]
Documentation/devicetree/bindings/i2c/nomadik.txt [deleted file]
Documentation/devicetree/bindings/i2c/omap-i2c.txt [deleted file]
Documentation/devicetree/bindings/i2c/pnx.txt [deleted file]
Documentation/devicetree/bindings/i2c/samsung-i2c.txt [deleted file]
Documentation/devicetree/bindings/i2c/sirf-i2c.txt [deleted file]
Documentation/devicetree/bindings/i2c/xiic.txt [deleted file]
drivers/i2c/busses/i2c-ocores.c

diff --git a/Documentation/devicetree/bindings/i2c/arm-versatile.txt b/Documentation/devicetree/bindings/i2c/arm-versatile.txt
deleted file mode 100644 (file)
index 361d31c..0000000
+++ /dev/null
@@ -1,10 +0,0 @@
-i2c Controller on ARM Versatile platform:
-
-Required properties:
-- compatible : Must be "arm,versatile-i2c";
-- reg
-- #address-cells = <1>;
-- #size-cells = <0>;
-
-Optional properties:
-- Child nodes conforming to i2c bus binding
diff --git a/Documentation/devicetree/bindings/i2c/atmel-i2c.txt b/Documentation/devicetree/bindings/i2c/atmel-i2c.txt
deleted file mode 100644 (file)
index b689a0d..0000000
+++ /dev/null
@@ -1,30 +0,0 @@
-I2C for Atmel platforms
-
-Required properties :
-- compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",
-     "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c"
-     or "atmel,at91sam9x5-i2c"
-- reg: physical base address of the controller and length of memory mapped
-     region.
-- interrupts: interrupt number to the cpu.
-- #address-cells = <1>;
-- #size-cells = <0>;
-
-Optional properties:
-- Child nodes conforming to i2c bus binding
-
-Examples :
-
-i2c0: i2c@fff84000 {
-       compatible = "atmel,at91sam9g20-i2c";
-       reg = <0xfff84000 0x100>;
-       interrupts = <12 4 6>;
-       #address-cells = <1>;
-       #size-cells = <0>;
-
-       24c512@50 {
-               compatible = "24c512";
-               reg = <0x50>;
-               pagesize = <128>;
-       }
-}
diff --git a/Documentation/devicetree/bindings/i2c/cavium-i2c.txt b/Documentation/devicetree/bindings/i2c/cavium-i2c.txt
deleted file mode 100644 (file)
index dced82e..0000000
+++ /dev/null
@@ -1,34 +0,0 @@
-* Two Wire Serial Interface (TWSI) / I2C
-
-- compatible: "cavium,octeon-3860-twsi"
-
-  Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
-
-- reg: The base address of the TWSI/I2C bus controller register bank.
-
-- #address-cells: Must be <1>.
-
-- #size-cells: Must be <0>.  I2C addresses have no size component.
-
-- interrupts: A single interrupt specifier.
-
-- clock-frequency: The I2C bus clock rate in Hz.
-
-Example:
-       twsi0: i2c@1180000001000 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "cavium,octeon-3860-twsi";
-               reg = <0x11800 0x00001000 0x0 0x200>;
-               interrupts = <0 45>;
-               clock-frequency = <100000>;
-
-               rtc@68 {
-                       compatible = "dallas,ds1337";
-                       reg = <0x68>;
-               };
-               tmp@4c {
-                       compatible = "ti,tmp421";
-                       reg = <0x4c>;
-               };
-       };
diff --git a/Documentation/devicetree/bindings/i2c/ce4100-i2c.txt b/Documentation/devicetree/bindings/i2c/ce4100-i2c.txt
deleted file mode 100644 (file)
index 569b162..0000000
+++ /dev/null
@@ -1,93 +0,0 @@
-CE4100 I2C
-----------
-
-CE4100 has one PCI device which is described as the I2C-Controller. This
-PCI device has three PCI-bars, each bar contains a complete I2C
-controller. So we have a total of three independent I2C-Controllers
-which share only an interrupt line.
-The driver is probed via the PCI-ID and is gathering the information of
-attached devices from the devices tree.
-Grant Likely recommended to use the ranges property to map the PCI-Bar
-number to its physical address and to use this to find the child nodes
-of the specific I2C controller. This were his exact words:
-
-       Here's where the magic happens.  Each entry in
-       ranges describes how the parent pci address space
-       (middle group of 3) is translated to the local
-       address space (first group of 2) and the size of
-       each range (last cell).  In this particular case,
-       the first cell of the local address is chosen to be
-       1:1 mapped to the BARs, and the second is the
-       offset from be base of the BAR (which would be
-       non-zero if you had 2 or more devices mapped off
-       the same BAR)
-
-       ranges allows the address mapping to be described
-       in a way that the OS can interpret without
-       requiring custom device driver code.
-
-This is an example which is used on FalconFalls:
-------------------------------------------------
-       i2c-controller@b,2 {
-               #address-cells = <2>;
-               #size-cells = <1>;
-               compatible = "pci8086,2e68.2",
-                               "pci8086,2e68",
-                               "pciclass,ff0000",
-                               "pciclass,ff00";
-
-               reg = <0x15a00 0x0 0x0 0x0 0x0>;
-               interrupts = <16 1>;
-
-               /* as described by Grant, the first number in the group of
-               * three is the bar number followed by the 64bit bar address
-               * followed by size of the mapping. The bar address
-               * requires also a valid translation in parents ranges
-               * property.
-               */
-               ranges = <0 0   0x02000000 0 0xdffe0500 0x100
-                         1 0   0x02000000 0 0xdffe0600 0x100
-                         2 0   0x02000000 0 0xdffe0700 0x100>;
-
-               i2c@0 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       compatible = "intel,ce4100-i2c-controller";
-
-                       /* The first number in the reg property is the
-                       * number of the bar
-                       */
-                       reg = <0 0 0x100>;
-
-                       /* This I2C controller has no devices */
-               };
-
-               i2c@1 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       compatible = "intel,ce4100-i2c-controller";
-                       reg = <1 0 0x100>;
-
-                       /* This I2C controller has one gpio controller */
-                       gpio@26 {
-                               #gpio-cells = <2>;
-                               compatible = "ti,pcf8575";
-                               reg = <0x26>;
-                               gpio-controller;
-                       };
-               };
-
-               i2c@2 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       compatible = "intel,ce4100-i2c-controller";
-                       reg = <2 0 0x100>;
-
-                       gpio@26 {
-                               #gpio-cells = <2>;
-                               compatible = "ti,pcf8575";
-                               reg = <0x26>;
-                               gpio-controller;
-                       };
-               };
-       };
diff --git a/Documentation/devicetree/bindings/i2c/davinci.txt b/Documentation/devicetree/bindings/i2c/davinci.txt
deleted file mode 100644 (file)
index 2dc935b..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-* Texas Instruments Davinci I2C
-
-This file provides information, what the device node for the
-davinci i2c interface contain.
-
-Required properties:
-- compatible: "ti,davinci-i2c";
-- reg : Offset and length of the register set for the device
-
-Recommended properties :
-- interrupts : standard interrupt property.
-- clock-frequency : desired I2C bus clock frequency in Hz.
-
-Example (enbw_cmc board):
-       i2c@1c22000 {
-               compatible = "ti,davinci-i2c";
-               reg = <0x22000 0x1000>;
-               clock-frequency = <100000>;
-               interrupts = <15>;
-               interrupt-parent = <&intc>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               dtt@48 {
-                       compatible = "national,lm75";
-                       reg = <0x48>;
-               };
-       };
diff --git a/Documentation/devicetree/bindings/i2c/fsl-i2c.txt b/Documentation/devicetree/bindings/i2c/fsl-i2c.txt
deleted file mode 100644 (file)
index 1eacd6b..0000000
+++ /dev/null
@@ -1,64 +0,0 @@
-* I2C
-
-Required properties :
-
- - reg : Offset and length of the register set for the device
- - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
-   compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
-   mpc5200 or mpc5200b. For the mpc5121, an additional node
-   "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
-
-Recommended properties :
-
- - interrupts : <a b> where a is the interrupt number and b is a
-   field that represents an encoding of the sense and level
-   information for the interrupt.  This should be encoded based on
-   the information in section 2) depending on the type of interrupt
-   controller you have.
- - interrupt-parent : the phandle for the interrupt controller that
-   services interrupts for this device.
- - fsl,preserve-clocking : boolean; if defined, the clock settings
-   from the bootloader are preserved (not touched).
- - clock-frequency : desired I2C bus clock frequency in Hz.
- - fsl,timeout : I2C bus timeout in microseconds.
-
-Examples :
-
-       /* MPC5121 based board */
-       i2c@1740 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "fsl,mpc5121-i2c", "fsl-i2c";
-               reg = <0x1740 0x20>;
-               interrupts = <11 0x8>;
-               interrupt-parent = <&ipic>;
-               clock-frequency = <100000>;
-       };
-
-       i2ccontrol@1760 {
-               compatible = "fsl,mpc5121-i2c-ctrl";
-               reg = <0x1760 0x8>;
-       };
-
-       /* MPC5200B based board */
-       i2c@3d00 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-               reg = <0x3d00 0x40>;
-               interrupts = <2 15 0>;
-               interrupt-parent = <&mpc5200_pic>;
-               fsl,preserve-clocking;
-       };
-
-       /* MPC8544 base board */
-       i2c@3100 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "fsl,mpc8544-i2c", "fsl-i2c";
-               reg = <0x3100 0x100>;
-               interrupts = <43 2>;
-               interrupt-parent = <&mpic>;
-               clock-frequency = <400000>;
-               fsl,timeout = <10000>;
-       };
diff --git a/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt b/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt
deleted file mode 100644 (file)
index f3cf43b..0000000
+++ /dev/null
@@ -1,25 +0,0 @@
-* Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
-
-Required properties:
-- compatible : Should be "fsl,<chip>-i2c"
-- reg : Should contain I2C/HS-I2C registers location and length
-- interrupts : Should contain I2C/HS-I2C interrupt
-
-Optional properties:
-- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
-  The absence of the propoerty indicates the default frequency 100 kHz.
-
-Examples:
-
-i2c@83fc4000 { /* I2C2 on i.MX51 */
-       compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
-       reg = <0x83fc4000 0x4000>;
-       interrupts = <63>;
-};
-
-i2c@70038000 { /* HS-I2C on i.MX51 */
-       compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
-       reg = <0x70038000 0x4000>;
-       interrupts = <64>;
-       clock-frequency = <400000>;
-};
diff --git a/Documentation/devicetree/bindings/i2c/gpio-i2c.txt b/Documentation/devicetree/bindings/i2c/gpio-i2c.txt
deleted file mode 100644 (file)
index 4f8ec94..0000000
+++ /dev/null
@@ -1,32 +0,0 @@
-Device-Tree bindings for i2c gpio driver
-
-Required properties:
-       - compatible = "i2c-gpio";
-       - gpios: sda and scl gpio
-
-
-Optional properties:
-       - i2c-gpio,sda-open-drain: sda as open drain
-       - i2c-gpio,scl-open-drain: scl as open drain
-       - i2c-gpio,scl-output-only: scl as output only
-       - i2c-gpio,delay-us: delay between GPIO operations (may depend on each platform)
-       - i2c-gpio,timeout-ms: timeout to get data
-
-Example nodes:
-
-i2c@0 {
-       compatible = "i2c-gpio";
-       gpios = <&pioA 23 0 /* sda */
-                &pioA 24 0 /* scl */
-               >;
-       i2c-gpio,sda-open-drain;
-       i2c-gpio,scl-open-drain;
-       i2c-gpio,delay-us = <2>;        /* ~100 kHz */
-       #address-cells = <1>;
-       #size-cells = <0>;
-
-       rv3029c2@56 {
-               compatible = "rv3029c2";
-               reg = <0x56>;
-       };
-};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-at91.txt b/Documentation/devicetree/bindings/i2c/i2c-at91.txt
new file mode 100644 (file)
index 0000000..b689a0d
--- /dev/null
@@ -0,0 +1,30 @@
+I2C for Atmel platforms
+
+Required properties :
+- compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",
+     "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c"
+     or "atmel,at91sam9x5-i2c"
+- reg: physical base address of the controller and length of memory mapped
+     region.
+- interrupts: interrupt number to the cpu.
+- #address-cells = <1>;
+- #size-cells = <0>;
+
+Optional properties:
+- Child nodes conforming to i2c bus binding
+
+Examples :
+
+i2c0: i2c@fff84000 {
+       compatible = "atmel,at91sam9g20-i2c";
+       reg = <0xfff84000 0x100>;
+       interrupts = <12 4 6>;
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       24c512@50 {
+               compatible = "24c512";
+               reg = <0x50>;
+               pagesize = <128>;
+       }
+}
diff --git a/Documentation/devicetree/bindings/i2c/i2c-davinci.txt b/Documentation/devicetree/bindings/i2c/i2c-davinci.txt
new file mode 100644 (file)
index 0000000..2dc935b
--- /dev/null
@@ -0,0 +1,28 @@
+* Texas Instruments Davinci I2C
+
+This file provides information, what the device node for the
+davinci i2c interface contain.
+
+Required properties:
+- compatible: "ti,davinci-i2c";
+- reg : Offset and length of the register set for the device
+
+Recommended properties :
+- interrupts : standard interrupt property.
+- clock-frequency : desired I2C bus clock frequency in Hz.
+
+Example (enbw_cmc board):
+       i2c@1c22000 {
+               compatible = "ti,davinci-i2c";
+               reg = <0x22000 0x1000>;
+               clock-frequency = <100000>;
+               interrupts = <15>;
+               interrupt-parent = <&intc>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               dtt@48 {
+                       compatible = "national,lm75";
+                       reg = <0x48>;
+               };
+       };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-gpio.txt b/Documentation/devicetree/bindings/i2c/i2c-gpio.txt
new file mode 100644 (file)
index 0000000..4f8ec94
--- /dev/null
@@ -0,0 +1,32 @@
+Device-Tree bindings for i2c gpio driver
+
+Required properties:
+       - compatible = "i2c-gpio";
+       - gpios: sda and scl gpio
+
+
+Optional properties:
+       - i2c-gpio,sda-open-drain: sda as open drain
+       - i2c-gpio,scl-open-drain: scl as open drain
+       - i2c-gpio,scl-output-only: scl as output only
+       - i2c-gpio,delay-us: delay between GPIO operations (may depend on each platform)
+       - i2c-gpio,timeout-ms: timeout to get data
+
+Example nodes:
+
+i2c@0 {
+       compatible = "i2c-gpio";
+       gpios = <&pioA 23 0 /* sda */
+                &pioA 24 0 /* scl */
+               >;
+       i2c-gpio,sda-open-drain;
+       i2c-gpio,scl-open-drain;
+       i2c-gpio,delay-us = <2>;        /* ~100 kHz */
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       rv3029c2@56 {
+               compatible = "rv3029c2";
+               reg = <0x56>;
+       };
+};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.txt b/Documentation/devicetree/bindings/i2c/i2c-imx.txt
new file mode 100644 (file)
index 0000000..f3cf43b
--- /dev/null
@@ -0,0 +1,25 @@
+* Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
+
+Required properties:
+- compatible : Should be "fsl,<chip>-i2c"
+- reg : Should contain I2C/HS-I2C registers location and length
+- interrupts : Should contain I2C/HS-I2C interrupt
+
+Optional properties:
+- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
+  The absence of the propoerty indicates the default frequency 100 kHz.
+
+Examples:
+
+i2c@83fc4000 { /* I2C2 on i.MX51 */
+       compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+       reg = <0x83fc4000 0x4000>;
+       interrupts = <63>;
+};
+
+i2c@70038000 { /* HS-I2C on i.MX51 */
+       compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+       reg = <0x70038000 0x4000>;
+       interrupts = <64>;
+       clock-frequency = <400000>;
+};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mpc.txt b/Documentation/devicetree/bindings/i2c/i2c-mpc.txt
new file mode 100644 (file)
index 0000000..1eacd6b
--- /dev/null
@@ -0,0 +1,64 @@
+* I2C
+
+Required properties :
+
+ - reg : Offset and length of the register set for the device
+ - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
+   compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
+   mpc5200 or mpc5200b. For the mpc5121, an additional node
+   "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
+
+Recommended properties :
+
+ - interrupts : <a b> where a is the interrupt number and b is a
+   field that represents an encoding of the sense and level
+   information for the interrupt.  This should be encoded based on
+   the information in section 2) depending on the type of interrupt
+   controller you have.
+ - interrupt-parent : the phandle for the interrupt controller that
+   services interrupts for this device.
+ - fsl,preserve-clocking : boolean; if defined, the clock settings
+   from the bootloader are preserved (not touched).
+ - clock-frequency : desired I2C bus clock frequency in Hz.
+ - fsl,timeout : I2C bus timeout in microseconds.
+
+Examples :
+
+       /* MPC5121 based board */
+       i2c@1740 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "fsl,mpc5121-i2c", "fsl-i2c";
+               reg = <0x1740 0x20>;
+               interrupts = <11 0x8>;
+               interrupt-parent = <&ipic>;
+               clock-frequency = <100000>;
+       };
+
+       i2ccontrol@1760 {
+               compatible = "fsl,mpc5121-i2c-ctrl";
+               reg = <0x1760 0x8>;
+       };
+
+       /* MPC5200B based board */
+       i2c@3d00 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+               reg = <0x3d00 0x40>;
+               interrupts = <2 15 0>;
+               interrupt-parent = <&mpc5200_pic>;
+               fsl,preserve-clocking;
+       };
+
+       /* MPC8544 base board */
+       i2c@3100 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "fsl,mpc8544-i2c", "fsl-i2c";
+               reg = <0x3100 0x100>;
+               interrupts = <43 2>;
+               interrupt-parent = <&mpic>;
+               clock-frequency = <400000>;
+               fsl,timeout = <10000>;
+       };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux.txt b/Documentation/devicetree/bindings/i2c/i2c-mux.txt
new file mode 100644 (file)
index 0000000..af84cce
--- /dev/null
@@ -0,0 +1,60 @@
+Common i2c bus multiplexer/switch properties.
+
+An i2c bus multiplexer/switch will have several child busses that are
+numbered uniquely in a device dependent manner.  The nodes for an i2c bus
+multiplexer/switch will have one child node for each child
+bus.
+
+Required properties:
+- #address-cells = <1>;
+- #size-cells = <0>;
+
+Required properties for child nodes:
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg : The sub-bus number.
+
+Optional properties for child nodes:
+- Other properties specific to the multiplexer/switch hardware.
+- Child nodes conforming to i2c bus binding
+
+
+Example :
+
+       /*
+          An NXP pca9548 8 channel I2C multiplexer at address 0x70
+          with two NXP pca8574 GPIO expanders attached, one each to
+          ports 3 and 4.
+        */
+
+       mux@70 {
+               compatible = "nxp,pca9548";
+               reg = <0x70>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               i2c@3 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <3>;
+
+                       gpio1: gpio@38 {
+                               compatible = "nxp,pca8574";
+                               reg = <0x38>;
+                               #gpio-cells = <2>;
+                               gpio-controller;
+                       };
+               };
+               i2c@4 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <4>;
+
+                       gpio2: gpio@38 {
+                               compatible = "nxp,pca8574";
+                               reg = <0x38>;
+                               #gpio-cells = <2>;
+                               gpio-controller;
+                       };
+               };
+       };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
new file mode 100644 (file)
index 0000000..f46d928
--- /dev/null
@@ -0,0 +1,18 @@
+
+* Marvell MV64XXX I2C controller
+
+Required properties :
+
+ - reg             : Offset and length of the register set for the device
+ - compatible      : Should be "marvell,mv64xxx-i2c"
+ - interrupts      : The interrupt number
+ - clock-frequency : Desired I2C bus clock frequency in Hz.
+
+Examples:
+
+       i2c@11000 {
+               compatible = "marvell,mv64xxx-i2c";
+               reg = <0x11000 0x20>;
+               interrupts = <29>;
+               clock-frequency = <100000>;
+       };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-nomadik.txt b/Documentation/devicetree/bindings/i2c/i2c-nomadik.txt
new file mode 100644 (file)
index 0000000..72065b0
--- /dev/null
@@ -0,0 +1,23 @@
+I2C for Nomadik based systems
+
+Required (non-standard) properties:
+ - Nil
+
+Recommended (non-standard) properties:
+ - clock-frequency : Maximum bus clock frequency for the device
+
+Optional (non-standard) properties:
+ - Nil
+
+Example :
+
+i2c@80004000 {
+        compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
+        reg = <0x80004000 0x1000>;
+        interrupts = <0 21 0x4>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        v-i2c-supply = <&db8500_vape_reg>;
+
+        clock-frequency = <400000>;
+};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-octeon.txt b/Documentation/devicetree/bindings/i2c/i2c-octeon.txt
new file mode 100644 (file)
index 0000000..dced82e
--- /dev/null
@@ -0,0 +1,34 @@
+* Two Wire Serial Interface (TWSI) / I2C
+
+- compatible: "cavium,octeon-3860-twsi"
+
+  Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
+
+- reg: The base address of the TWSI/I2C bus controller register bank.
+
+- #address-cells: Must be <1>.
+
+- #size-cells: Must be <0>.  I2C addresses have no size component.
+
+- interrupts: A single interrupt specifier.
+
+- clock-frequency: The I2C bus clock rate in Hz.
+
+Example:
+       twsi0: i2c@1180000001000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "cavium,octeon-3860-twsi";
+               reg = <0x11800 0x00001000 0x0 0x200>;
+               interrupts = <0 45>;
+               clock-frequency = <100000>;
+
+               rtc@68 {
+                       compatible = "dallas,ds1337";
+                       reg = <0x68>;
+               };
+               tmp@4c {
+                       compatible = "ti,tmp421";
+                       reg = <0x4c>;
+               };
+       };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-omap.txt b/Documentation/devicetree/bindings/i2c/i2c-omap.txt
new file mode 100644 (file)
index 0000000..56564aa
--- /dev/null
@@ -0,0 +1,30 @@
+I2C for OMAP platforms
+
+Required properties :
+- compatible : Must be "ti,omap3-i2c" or "ti,omap4-i2c"
+- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)
+- #address-cells = <1>;
+- #size-cells = <0>;
+
+Recommended properties :
+- clock-frequency : Desired I2C bus clock frequency in Hz. Otherwise
+  the default 100 kHz frequency will be used.
+
+Optional properties:
+- Child nodes conforming to i2c bus binding
+
+Note: Current implementation will fetch base address, irq and dma
+from omap hwmod data base during device registration.
+Future plan is to migrate hwmod data base contents into device tree
+blob so that, all the required data will be used from device tree dts
+file.
+
+Examples :
+
+i2c1: i2c@0 {
+    compatible = "ti,omap3-i2c";
+    #address-cells = <1>;
+    #size-cells = <0>;
+    ti,hwmods = "i2c1";
+    clock-frequency = <400000>;
+};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-pnx.txt b/Documentation/devicetree/bindings/i2c/i2c-pnx.txt
new file mode 100644 (file)
index 0000000..fe98ada
--- /dev/null
@@ -0,0 +1,36 @@
+* NXP PNX I2C Controller
+
+Required properties:
+
+ - reg: Offset and length of the register set for the device
+ - compatible: should be "nxp,pnx-i2c"
+ - interrupts: configure one interrupt line
+ - #address-cells: always 1 (for i2c addresses)
+ - #size-cells: always 0
+ - interrupt-parent: the phandle for the interrupt controller that
+   services interrupts for this device.
+
+Optional properties:
+
+ - clock-frequency: desired I2C bus clock frequency in Hz, Default: 100000 Hz
+
+Examples:
+
+       i2c1: i2c@400a0000 {
+               compatible = "nxp,pnx-i2c";
+               reg = <0x400a0000 0x100>;
+               interrupt-parent = <&mic>;
+               interrupts = <51 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
+       i2c2: i2c@400a8000 {
+               compatible = "nxp,pnx-i2c";
+               reg = <0x400a8000 0x100>;
+               interrupt-parent = <&mic>;
+               interrupts = <50 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clock-frequency = <100000>;
+       };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-pxa-pci-ce4100.txt b/Documentation/devicetree/bindings/i2c/i2c-pxa-pci-ce4100.txt
new file mode 100644 (file)
index 0000000..569b162
--- /dev/null
@@ -0,0 +1,93 @@
+CE4100 I2C
+----------
+
+CE4100 has one PCI device which is described as the I2C-Controller. This
+PCI device has three PCI-bars, each bar contains a complete I2C
+controller. So we have a total of three independent I2C-Controllers
+which share only an interrupt line.
+The driver is probed via the PCI-ID and is gathering the information of
+attached devices from the devices tree.
+Grant Likely recommended to use the ranges property to map the PCI-Bar
+number to its physical address and to use this to find the child nodes
+of the specific I2C controller. This were his exact words:
+
+       Here's where the magic happens.  Each entry in
+       ranges describes how the parent pci address space
+       (middle group of 3) is translated to the local
+       address space (first group of 2) and the size of
+       each range (last cell).  In this particular case,
+       the first cell of the local address is chosen to be
+       1:1 mapped to the BARs, and the second is the
+       offset from be base of the BAR (which would be
+       non-zero if you had 2 or more devices mapped off
+       the same BAR)
+
+       ranges allows the address mapping to be described
+       in a way that the OS can interpret without
+       requiring custom device driver code.
+
+This is an example which is used on FalconFalls:
+------------------------------------------------
+       i2c-controller@b,2 {
+               #address-cells = <2>;
+               #size-cells = <1>;
+               compatible = "pci8086,2e68.2",
+                               "pci8086,2e68",
+                               "pciclass,ff0000",
+                               "pciclass,ff00";
+
+               reg = <0x15a00 0x0 0x0 0x0 0x0>;
+               interrupts = <16 1>;
+
+               /* as described by Grant, the first number in the group of
+               * three is the bar number followed by the 64bit bar address
+               * followed by size of the mapping. The bar address
+               * requires also a valid translation in parents ranges
+               * property.
+               */
+               ranges = <0 0   0x02000000 0 0xdffe0500 0x100
+                         1 0   0x02000000 0 0xdffe0600 0x100
+                         2 0   0x02000000 0 0xdffe0700 0x100>;
+
+               i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "intel,ce4100-i2c-controller";
+
+                       /* The first number in the reg property is the
+                       * number of the bar
+                       */
+                       reg = <0 0 0x100>;
+
+                       /* This I2C controller has no devices */
+               };
+
+               i2c@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "intel,ce4100-i2c-controller";
+                       reg = <1 0 0x100>;
+
+                       /* This I2C controller has one gpio controller */
+                       gpio@26 {
+                               #gpio-cells = <2>;
+                               compatible = "ti,pcf8575";
+                               reg = <0x26>;
+                               gpio-controller;
+                       };
+               };
+
+               i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "intel,ce4100-i2c-controller";
+                       reg = <2 0 0x100>;
+
+                       gpio@26 {
+                               #gpio-cells = <2>;
+                               compatible = "ti,pcf8575";
+                               reg = <0x26>;
+                               gpio-controller;
+                       };
+               };
+       };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-pxa.txt b/Documentation/devicetree/bindings/i2c/i2c-pxa.txt
new file mode 100644 (file)
index 0000000..12b78ac
--- /dev/null
@@ -0,0 +1,33 @@
+* Marvell MMP I2C controller
+
+Required properties :
+
+ - reg : Offset and length of the register set for the device
+ - compatible : should be "mrvl,mmp-twsi" where mmp is the name of a
+   compatible processor, e.g. pxa168, pxa910, mmp2, mmp3.
+   For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required
+   as shown in the example below.
+
+Recommended properties :
+
+ - interrupts : the interrupt number
+ - interrupt-parent : the phandle for the interrupt controller that
+   services interrupts for this device. If the parent is the default
+   interrupt controller in device tree, it could be ignored.
+ - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
+   status register of i2c controller instead.
+ - mrvl,i2c-fast-mode : Enable fast mode of i2c controller.
+
+Examples:
+       twsi1: i2c@d4011000 {
+               compatible = "mrvl,mmp-twsi";
+               reg = <0xd4011000 0x1000>;
+               interrupts = <7>;
+               mrvl,i2c-fast-mode;
+       };
+       
+       twsi2: i2c@d4025000 {
+               compatible = "mrvl,mmp-twsi";
+               reg = <0xd4025000 0x1000>;
+               interrupts = <58>;
+       };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt b/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt
new file mode 100644 (file)
index 0000000..b6cb5a1
--- /dev/null
@@ -0,0 +1,43 @@
+* Samsung's I2C controller
+
+The Samsung's I2C controller is used to interface with I2C devices.
+
+Required properties:
+  - compatible: value should be either of the following.
+      (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.
+      (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.
+      (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used
+          inside HDMIPHY block found on several samsung SoCs
+  - reg: physical base address of the controller and length of memory mapped
+    region.
+  - interrupts: interrupt number to the cpu.
+  - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges.
+
+Optional properties:
+  - gpios: The order of the gpios should be the following: <SDA, SCL>.
+    The gpio specifier depends on the gpio controller. Required in all
+    cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output
+    lines are permanently wired to the respective client
+  - samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not
+    specified, default value is 0.
+  - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
+    specified, the default value in Hz is 100000.
+
+Example:
+
+       i2c@13870000 {
+               compatible = "samsung,s3c2440-i2c";
+               reg = <0x13870000 0x100>;
+               interrupts = <345>;
+               samsung,i2c-sda-delay = <100>;
+               samsung,i2c-max-bus-freq = <100000>;
+               gpios = <&gpd1 2 0 /* SDA */
+                        &gpd1 3 0 /* SCL */>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               wm8994@1a {
+                       compatible = "wlf,wm8994";
+                       reg = <0x1a>;
+               };
+       };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-sirf.txt b/Documentation/devicetree/bindings/i2c/i2c-sirf.txt
new file mode 100644 (file)
index 0000000..7baf9e1
--- /dev/null
@@ -0,0 +1,19 @@
+I2C for SiRFprimaII platforms
+
+Required properties :
+- compatible : Must be "sirf,prima2-i2c"
+- reg: physical base address of the controller and length of memory mapped
+     region.
+- interrupts: interrupt number to the cpu.
+
+Optional properties:
+- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
+  The absence of the propoerty indicates the default frequency 100 kHz.
+
+Examples :
+
+i2c0: i2c@b00e0000 {
+    compatible = "sirf,prima2-i2c";
+    reg = <0xb00e0000 0x10000>;
+    interrupts = <24>;
+};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-versatile.txt b/Documentation/devicetree/bindings/i2c/i2c-versatile.txt
new file mode 100644 (file)
index 0000000..361d31c
--- /dev/null
@@ -0,0 +1,10 @@
+i2c Controller on ARM Versatile platform:
+
+Required properties:
+- compatible : Must be "arm,versatile-i2c";
+- reg
+- #address-cells = <1>;
+- #size-cells = <0>;
+
+Optional properties:
+- Child nodes conforming to i2c bus binding
diff --git a/Documentation/devicetree/bindings/i2c/i2c-xiic.txt b/Documentation/devicetree/bindings/i2c/i2c-xiic.txt
new file mode 100644 (file)
index 0000000..ceabbe9
--- /dev/null
@@ -0,0 +1,22 @@
+Xilinx IIC controller:
+
+Required properties:
+- compatible : Must be "xlnx,xps-iic-2.00.a"
+- reg : IIC register location and length
+- interrupts : IIC controller unterrupt
+- #address-cells = <1>
+- #size-cells = <0>
+
+Optional properties:
+- Child nodes conforming to i2c bus binding
+
+Example:
+
+       axi_iic_0: i2c@40800000 {
+               compatible = "xlnx,xps-iic-2.00.a";
+               interrupts = < 1 2 >;
+               reg = < 0x40800000 0x10000 >;
+
+               #size-cells = <0>;
+               #address-cells = <1>;
+       };
diff --git a/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt b/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt
deleted file mode 100644 (file)
index 0f79450..0000000
+++ /dev/null
@@ -1,51 +0,0 @@
-* Marvell MMP I2C controller
-
-Required properties :
-
- - reg : Offset and length of the register set for the device
- - compatible : should be "mrvl,mmp-twsi" where mmp is the name of a
-   compatible processor, e.g. pxa168, pxa910, mmp2, mmp3.
-   For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required
-   as shown in the example below.
-
-Recommended properties :
-
- - interrupts : the interrupt number
- - interrupt-parent : the phandle for the interrupt controller that
-   services interrupts for this device. If the parent is the default
-   interrupt controller in device tree, it could be ignored.
- - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
-   status register of i2c controller instead.
- - mrvl,i2c-fast-mode : Enable fast mode of i2c controller.
-
-Examples:
-       twsi1: i2c@d4011000 {
-               compatible = "mrvl,mmp-twsi";
-               reg = <0xd4011000 0x1000>;
-               interrupts = <7>;
-               mrvl,i2c-fast-mode;
-       };
-       
-       twsi2: i2c@d4025000 {
-               compatible = "mrvl,mmp-twsi";
-               reg = <0xd4025000 0x1000>;
-               interrupts = <58>;
-       };
-
-* Marvell MV64XXX I2C controller
-
-Required properties :
-
- - reg             : Offset and length of the register set for the device
- - compatible      : Should be "marvell,mv64xxx-i2c"
- - interrupts      : The interrupt number
- - clock-frequency : Desired I2C bus clock frequency in Hz.
-
-Examples:
-
-       i2c@11000 {
-               compatible = "marvell,mv64xxx-i2c";
-               reg = <0x11000 0x20>;
-               interrupts = <29>;
-               clock-frequency = <100000>;
-       };
diff --git a/Documentation/devicetree/bindings/i2c/mux.txt b/Documentation/devicetree/bindings/i2c/mux.txt
deleted file mode 100644 (file)
index af84cce..0000000
+++ /dev/null
@@ -1,60 +0,0 @@
-Common i2c bus multiplexer/switch properties.
-
-An i2c bus multiplexer/switch will have several child busses that are
-numbered uniquely in a device dependent manner.  The nodes for an i2c bus
-multiplexer/switch will have one child node for each child
-bus.
-
-Required properties:
-- #address-cells = <1>;
-- #size-cells = <0>;
-
-Required properties for child nodes:
-- #address-cells = <1>;
-- #size-cells = <0>;
-- reg : The sub-bus number.
-
-Optional properties for child nodes:
-- Other properties specific to the multiplexer/switch hardware.
-- Child nodes conforming to i2c bus binding
-
-
-Example :
-
-       /*
-          An NXP pca9548 8 channel I2C multiplexer at address 0x70
-          with two NXP pca8574 GPIO expanders attached, one each to
-          ports 3 and 4.
-        */
-
-       mux@70 {
-               compatible = "nxp,pca9548";
-               reg = <0x70>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               i2c@3 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       reg = <3>;
-
-                       gpio1: gpio@38 {
-                               compatible = "nxp,pca8574";
-                               reg = <0x38>;
-                               #gpio-cells = <2>;
-                               gpio-controller;
-                       };
-               };
-               i2c@4 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       reg = <4>;
-
-                       gpio2: gpio@38 {
-                               compatible = "nxp,pca8574";
-                               reg = <0x38>;
-                               #gpio-cells = <2>;
-                               gpio-controller;
-                       };
-               };
-       };
diff --git a/Documentation/devicetree/bindings/i2c/nomadik.txt b/Documentation/devicetree/bindings/i2c/nomadik.txt
deleted file mode 100644 (file)
index 72065b0..0000000
+++ /dev/null
@@ -1,23 +0,0 @@
-I2C for Nomadik based systems
-
-Required (non-standard) properties:
- - Nil
-
-Recommended (non-standard) properties:
- - clock-frequency : Maximum bus clock frequency for the device
-
-Optional (non-standard) properties:
- - Nil
-
-Example :
-
-i2c@80004000 {
-        compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
-        reg = <0x80004000 0x1000>;
-        interrupts = <0 21 0x4>;
-        #address-cells = <1>;
-        #size-cells = <0>;
-        v-i2c-supply = <&db8500_vape_reg>;
-
-        clock-frequency = <400000>;
-};
diff --git a/Documentation/devicetree/bindings/i2c/omap-i2c.txt b/Documentation/devicetree/bindings/i2c/omap-i2c.txt
deleted file mode 100644 (file)
index 56564aa..0000000
+++ /dev/null
@@ -1,30 +0,0 @@
-I2C for OMAP platforms
-
-Required properties :
-- compatible : Must be "ti,omap3-i2c" or "ti,omap4-i2c"
-- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)
-- #address-cells = <1>;
-- #size-cells = <0>;
-
-Recommended properties :
-- clock-frequency : Desired I2C bus clock frequency in Hz. Otherwise
-  the default 100 kHz frequency will be used.
-
-Optional properties:
-- Child nodes conforming to i2c bus binding
-
-Note: Current implementation will fetch base address, irq and dma
-from omap hwmod data base during device registration.
-Future plan is to migrate hwmod data base contents into device tree
-blob so that, all the required data will be used from device tree dts
-file.
-
-Examples :
-
-i2c1: i2c@0 {
-    compatible = "ti,omap3-i2c";
-    #address-cells = <1>;
-    #size-cells = <0>;
-    ti,hwmods = "i2c1";
-    clock-frequency = <400000>;
-};
diff --git a/Documentation/devicetree/bindings/i2c/pnx.txt b/Documentation/devicetree/bindings/i2c/pnx.txt
deleted file mode 100644 (file)
index fe98ada..0000000
+++ /dev/null
@@ -1,36 +0,0 @@
-* NXP PNX I2C Controller
-
-Required properties:
-
- - reg: Offset and length of the register set for the device
- - compatible: should be "nxp,pnx-i2c"
- - interrupts: configure one interrupt line
- - #address-cells: always 1 (for i2c addresses)
- - #size-cells: always 0
- - interrupt-parent: the phandle for the interrupt controller that
-   services interrupts for this device.
-
-Optional properties:
-
- - clock-frequency: desired I2C bus clock frequency in Hz, Default: 100000 Hz
-
-Examples:
-
-       i2c1: i2c@400a0000 {
-               compatible = "nxp,pnx-i2c";
-               reg = <0x400a0000 0x100>;
-               interrupt-parent = <&mic>;
-               interrupts = <51 0>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-       };
-
-       i2c2: i2c@400a8000 {
-               compatible = "nxp,pnx-i2c";
-               reg = <0x400a8000 0x100>;
-               interrupt-parent = <&mic>;
-               interrupts = <50 0>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-               clock-frequency = <100000>;
-       };
diff --git a/Documentation/devicetree/bindings/i2c/samsung-i2c.txt b/Documentation/devicetree/bindings/i2c/samsung-i2c.txt
deleted file mode 100644 (file)
index b6cb5a1..0000000
+++ /dev/null
@@ -1,43 +0,0 @@
-* Samsung's I2C controller
-
-The Samsung's I2C controller is used to interface with I2C devices.
-
-Required properties:
-  - compatible: value should be either of the following.
-      (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.
-      (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.
-      (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used
-          inside HDMIPHY block found on several samsung SoCs
-  - reg: physical base address of the controller and length of memory mapped
-    region.
-  - interrupts: interrupt number to the cpu.
-  - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges.
-
-Optional properties:
-  - gpios: The order of the gpios should be the following: <SDA, SCL>.
-    The gpio specifier depends on the gpio controller. Required in all
-    cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output
-    lines are permanently wired to the respective client
-  - samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not
-    specified, default value is 0.
-  - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
-    specified, the default value in Hz is 100000.
-
-Example:
-
-       i2c@13870000 {
-               compatible = "samsung,s3c2440-i2c";
-               reg = <0x13870000 0x100>;
-               interrupts = <345>;
-               samsung,i2c-sda-delay = <100>;
-               samsung,i2c-max-bus-freq = <100000>;
-               gpios = <&gpd1 2 0 /* SDA */
-                        &gpd1 3 0 /* SCL */>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               wm8994@1a {
-                       compatible = "wlf,wm8994";
-                       reg = <0x1a>;
-               };
-       };
diff --git a/Documentation/devicetree/bindings/i2c/sirf-i2c.txt b/Documentation/devicetree/bindings/i2c/sirf-i2c.txt
deleted file mode 100644 (file)
index 7baf9e1..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-I2C for SiRFprimaII platforms
-
-Required properties :
-- compatible : Must be "sirf,prima2-i2c"
-- reg: physical base address of the controller and length of memory mapped
-     region.
-- interrupts: interrupt number to the cpu.
-
-Optional properties:
-- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
-  The absence of the propoerty indicates the default frequency 100 kHz.
-
-Examples :
-
-i2c0: i2c@b00e0000 {
-    compatible = "sirf,prima2-i2c";
-    reg = <0xb00e0000 0x10000>;
-    interrupts = <24>;
-};
diff --git a/Documentation/devicetree/bindings/i2c/xiic.txt b/Documentation/devicetree/bindings/i2c/xiic.txt
deleted file mode 100644 (file)
index ceabbe9..0000000
+++ /dev/null
@@ -1,22 +0,0 @@
-Xilinx IIC controller:
-
-Required properties:
-- compatible : Must be "xlnx,xps-iic-2.00.a"
-- reg : IIC register location and length
-- interrupts : IIC controller unterrupt
-- #address-cells = <1>
-- #size-cells = <0>
-
-Optional properties:
-- Child nodes conforming to i2c bus binding
-
-Example:
-
-       axi_iic_0: i2c@40800000 {
-               compatible = "xlnx,xps-iic-2.00.a";
-               interrupts = < 1 2 >;
-               reg = < 0x40800000 0x10000 >;
-
-               #size-cells = <0>;
-               #address-cells = <1>;
-       };
index bffd5501ac2ddd5516f29dfb08bb12add1e196fe..15da1ac7cf9e05983a8a8db08907023e435d2325 100644 (file)
@@ -9,10 +9,6 @@
  * kind, whether express or implied.
  */
 
-/*
- * This driver can be used from the device tree, see
- *     Documentation/devicetree/bindings/i2c/ocore-i2c.txt
- */
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>