* struct pmc_x86_ops - performance counter x86 ops
*/
struct pmc_x86_ops {
- u64 (*save_disable_all) (void);
- void (*restore_all) (u64 ctrl);
- unsigned eventsel;
- unsigned perfctr;
- int (*event_map) (int event);
- int max_events;
+ u64 (*save_disable_all)(void);
+ void (*restore_all)(u64 ctrl);
+ unsigned eventsel;
+ unsigned perfctr;
+ int (*event_map)(int event);
+ int max_events;
};
static struct pmc_x86_ops *pmc_ops;
/*
* Maximum interrupt frequency of 100KHz per CPU
*/
-#define PERFMON_MAX_INTERRUPTS 100000/HZ
+#define PERFMON_MAX_INTERRUPTS (100000/HZ)
/*
* This handler is triggered by the local APIC, so the APIC IRQ handling