ath10k: bypass PLL setting on target init for QCA9888
authorRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Fri, 29 May 2015 14:51:53 +0000 (17:51 +0300)
committerKalle Valo <kvalo@qca.qualcomm.com>
Mon, 1 Jun 2015 07:00:41 +0000 (10:00 +0300)
Some of of qca988x solutions are having global reset issue
during target initialization. Bypassing PLL setting before
downloading firmware and letting the SoC run on REF_CLK is fixing
the problem. Corresponding firmware change is also needed to set
the clock source once the target is initialized. Since 10.2.4
firmware is having this ROM patch, applying skip_clock_init only
for 10.2.4 firmware versions.

Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath10k/core.c
drivers/net/wireless/ath/ath10k/core.h

index 684d460d79b725227be43babb62f9f2344e9099d..59496a90ad5e241563f5bcaa8226ebfde87bd478 100644 (file)
@@ -1085,6 +1085,22 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
        if (status)
                goto err;
 
+       /* Some of of qca988x solutions are having global reset issue
+         * during target initialization. Bypassing PLL setting before
+         * downloading firmware and letting the SoC run on REF_CLK is
+         * fixing the problem. Corresponding firmware change is also needed
+         * to set the clock source once the target is initialized.
+        */
+       if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
+                    ar->fw_features)) {
+               status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
+               if (status) {
+                       ath10k_err(ar, "could not write to skip_clock_init: %d\n",
+                                  status);
+                       goto err;
+               }
+       }
+
        status = ath10k_download_fw(ar, mode);
        if (status)
                goto err;
index 87376b3283f503e53b75fd0ce7023150e0296f27..45f9603a0868d3a43f21136781736c30d10da57e 100644 (file)
@@ -468,6 +468,9 @@ enum ath10k_fw_features {
         */
        ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
 
+       /* Firmware supports bypassing PLL setting on init. */
+       ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
+
        /* keep last */
        ATH10K_FW_FEATURE_COUNT,
 };