ARM: Kirkwood: switch to DT clock providers
authorAndrew Lunn <andrew@lunn.ch>
Sat, 17 Nov 2012 14:22:28 +0000 (15:22 +0100)
committerThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tue, 20 Nov 2012 13:46:50 +0000 (14:46 +0100)
With true DT clock providers available switch Kirkwood clock setup in
DT- enabled boards. While AUXDATA can be removed completely from bus
probing, some devices still don't know about DT. Therefore, some clkdev
aliases are created until these devices also move to DT.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
arch/arm/boot/dts/kirkwood.dtsi
arch/arm/mach-kirkwood/Kconfig
arch/arm/mach-kirkwood/board-dt.c
arch/arm/plat-orion/include/plat/common.h

index 4e5b8154a5be5d95535cd5eb9d66f894670c0946..7a9fac0d4251d49baa9b11eedf6ee71dc1d5c7cf 100644 (file)
                #address-cells = <1>;
                #size-cells = <1>;
 
+               core_clk: core-clocks@10030 {
+                       compatible = "marvell,kirkwood-core-clock";
+                       reg = <0x10030 0x4>;
+                       #clock-cells = <1>;
+               };
+
                gpio0: gpio@10100 {
                        compatible = "marvell,orion-gpio";
                        #gpio-cells = <2>;
@@ -42,6 +48,7 @@
                        reg = <0x12000 0x100>;
                        reg-shift = <2>;
                        interrupts = <33>;
+                       clocks = <&gate_clk 7>;
                        /* set clock-frequency in board dts */
                        status = "disabled";
                };
@@ -51,6 +58,7 @@
                        reg = <0x12100 0x100>;
                        reg-shift = <2>;
                        interrupts = <34>;
+                       clocks = <&gate_clk 7>;
                        /* set clock-frequency in board dts */
                        status = "disabled";
                };
                        cell-index = <0>;
                        interrupts = <23>;
                        reg = <0x10600 0x28>;
+                       clocks = <&gate_clk 7>;
                        status = "disabled";
                };
 
+               gate_clk: clock-gating-control@2011c {
+                       compatible = "marvell,kirkwood-gating-clock";
+                       reg = <0x2011c 0x4>;
+                       clocks = <&core_clk 0>;
+                       #clock-cells = <1>;
+               };
+
                wdt@20300 {
                        compatible = "marvell,orion-wdt";
                        reg = <0x20300 0x28>;
+                       clocks = <&gate_clk 7>;
                        status = "okay";
                };
 
@@ -81,6 +98,8 @@
                        compatible = "marvell,orion-sata";
                        reg = <0x80000 0x5000>;
                        interrupts = <21>;
+                       clocks = <&gate_clk 14>, <&gate_clk 15>;
+                       clock-names = "0", "1";
                        status = "disabled";
                };
 
                        reg = <0x3000000 0x400>;
                        chip-delay = <25>;
                        /* set partition map and/or chip-delay in board dts */
+                       clocks = <&gate_clk 7>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        interrupts = <29>;
                        clock-frequency = <100000>;
+                       clocks = <&gate_clk 7>;
                        status = "disabled";
                };
 
                              <0xf5000000 0x800>;
                        reg-names = "regs", "sram";
                        interrupts = <22>;
+                       clocks = <&gate_clk 17>;
                        status = "okay";
                };
        };
index 50bca5032b7e0c00bf0871bb52b75ec7309911d7..2833492eb2739795193188132afe14a0d85e31fe 100644 (file)
@@ -46,6 +46,8 @@ config MACH_GURUPLUG
 
 config ARCH_KIRKWOOD_DT
        bool "Marvell Kirkwood Flattened Device Tree"
+       select MVEBU_CLK_CORE
+       select MVEBU_CLK_GATING
        select USE_OF
        help
          Say 'Y' here if you want your kernel to support the
index d94872fed8c0cb2a5529260cb2ceca68d1c75a14..8bdfaa4db09126c1c871e10f4f0169d76b4ed55e 100644 (file)
 #include <linux/init.h>
 #include <linux/of.h>
 #include <linux/of_platform.h>
+#include <linux/clk-provider.h>
+#include <linux/clk/mvebu.h>
 #include <linux/kexec.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/bridge-regs.h>
+#include <linux/platform_data/usb-ehci-orion.h>
 #include <plat/irq.h>
+#include <plat/common.h>
 #include "common.h"
 
 static struct of_device_id kirkwood_dt_match_table[] __initdata = {
@@ -26,16 +30,58 @@ static struct of_device_id kirkwood_dt_match_table[] __initdata = {
        { }
 };
 
-struct of_dev_auxdata kirkwood_auxdata_lookup[] __initdata = {
-       OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL),
-       OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0",
-                      NULL),
-       OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL),
-       OF_DEV_AUXDATA("marvell,orion-sata", 0xf1080000, "sata_mv.0", NULL),
-       OF_DEV_AUXDATA("marvell,orion-nand", 0xf4000000, "orion_nand", NULL),
-       OF_DEV_AUXDATA("marvell,orion-crypto", 0xf1030000, "mv_crypto", NULL),
-       {},
-};
+/*
+ * There are still devices that doesn't know about DT yet.  Get clock
+ * gates here and add a clock lookup alias, so that old platform
+ * devices still work.
+*/
+
+static void __init kirkwood_legacy_clk_init(void)
+{
+
+       struct device_node *np = of_find_compatible_node(
+               NULL, NULL, "marvell,kirkwood-gating-clock");
+
+       struct of_phandle_args clkspec;
+
+       clkspec.np = np;
+       clkspec.args_count = 1;
+
+       clkspec.args[0] = CGC_BIT_GE0;
+       orion_clkdev_add(NULL, "mv643xx_eth_port.0",
+                        of_clk_get_from_provider(&clkspec));
+
+       clkspec.args[0] = CGC_BIT_PEX0;
+       orion_clkdev_add("0", "pcie",
+                        of_clk_get_from_provider(&clkspec));
+
+       clkspec.args[0] = CGC_BIT_USB0;
+       orion_clkdev_add(NULL, "orion-ehci.0",
+                        of_clk_get_from_provider(&clkspec));
+
+       clkspec.args[0] = CGC_BIT_XOR0;
+       orion_clkdev_add(NULL, "mv_xor_shared.0",
+                        of_clk_get_from_provider(&clkspec));
+
+       clkspec.args[0] = CGC_BIT_XOR1;
+       orion_clkdev_add(NULL, "mv_xor_shared.1",
+                        of_clk_get_from_provider(&clkspec));
+
+       clkspec.args[0] = CGC_BIT_PEX1;
+       orion_clkdev_add("1", "pcie",
+                        of_clk_get_from_provider(&clkspec));
+
+       clkspec.args[0] = CGC_BIT_GE1;
+       orion_clkdev_add(NULL, "mv643xx_eth_port.1",
+                        of_clk_get_from_provider(&clkspec));
+
+}
+
+static void __init kirkwood_of_clk_init(void)
+{
+       mvebu_clocks_init();
+       kirkwood_legacy_clk_init();
+}
 
 static void __init kirkwood_dt_init(void)
 {
@@ -54,7 +100,7 @@ static void __init kirkwood_dt_init(void)
        kirkwood_l2_init();
 
        /* Setup root of clk tree */
-       kirkwood_clk_init();
+       kirkwood_of_clk_init();
 
        /* internal devices that every board has */
        kirkwood_xor0_init();
@@ -94,8 +140,7 @@ static void __init kirkwood_dt_init(void)
        if (of_machine_is_compatible("keymile,km_kirkwood"))
                km_kirkwood_init();
 
-       of_platform_populate(NULL, kirkwood_dt_match_table,
-                            kirkwood_auxdata_lookup, NULL);
+       of_platform_populate(NULL, kirkwood_dt_match_table, NULL, NULL);
 }
 
 static const char *kirkwood_dt_board_compat[] = {
index 6bbc3fe5f58eec878490bc31c8173e336a644d1b..e06fc5fefa14c9ec7d0b46b002da64bc8cb425f8 100644 (file)
@@ -12,6 +12,7 @@
 #include <linux/mv643xx_eth.h>
 
 struct dsa_platform_data;
+struct mv_sata_platform_data;
 
 void __init orion_uart0_init(void __iomem *membase,
                             resource_size_t mapbase,