clk: zte: Mark pll config tables as const
authorStephen Boyd <sboyd@codeaurora.org>
Fri, 7 Apr 2017 19:21:33 +0000 (12:21 -0700)
committerMichael Turquette <mturquette@baylibre.com>
Wed, 12 Apr 2017 16:51:34 +0000 (18:51 +0200)
These should be const.

Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
drivers/clk/zte/clk-zx296718.c

index 8db0119bc6f7ed10ac8ea665f88705d04363478f..a10962988ba8efd9441ca22c327899d0fbc05fb1 100644 (file)
 
 static DEFINE_SPINLOCK(clk_lock);
 
-static struct zx_pll_config pll_cpu_table[] = {
+static const struct zx_pll_config pll_cpu_table[] = {
        PLL_RATE(1312000000, 0x00103621, 0x04aaaaaa),
        PLL_RATE(1407000000, 0x00103a21, 0x04aaaaaa),
        PLL_RATE(1503000000, 0x00103e21, 0x04aaaaaa),
        PLL_RATE(1600000000, 0x00104221, 0x04aaaaaa),
 };
 
-static struct zx_pll_config pll_vga_table[] = {
+static const struct zx_pll_config pll_vga_table[] = {
        PLL_RATE(36000000,  0x00102464, 0x04000000), /* 800x600@56 */
        PLL_RATE(40000000,  0x00102864, 0x04000000), /* 800x600@60 */
        PLL_RATE(49500000,  0x00103164, 0x04800000), /* 800x600@75 */