MIPS: Add identifiers for Octeon II CPUs.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1662/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index b201a8f5b127898ff645cfe0da800158a3b6595d..049a189ea91f5a95719dd4859be1504310840819 100644 (file)
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -131,6 +131,7 @@
 #define PRID_IMP_CAVIUM_CN56XX 0x0400
 #define PRID_IMP_CAVIUM_CN50XX 0x0600
 #define PRID_IMP_CAVIUM_CN52XX 0x0700
+#define PRID_IMP_CAVIUM_CN63XX 0x9000
 
 /*
  * These are the PRID's for when 23:16 == PRID_COMP_INGENIC
@@ -231,7 +232,7 @@ enum cpu_type_enum {
         * MIPS64 class processors
         */
        CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
-       CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS,
+       CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2,
 
        CPU_LAST
 };