clk: add CLK_DIVIDER_PROHIBIT_ZERO to prohibit value 0 of register.
authorSunny Luo <sunny.luo@amlogic.com>
Thu, 5 Jul 2018 07:32:32 +0000 (15:32 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Fri, 6 Jul 2018 05:51:45 +0000 (22:51 -0700)
PD#164751: clk: add CLK_DIVIDER_PROHIBIT_ZERO to prohibit value 0 of
register.

There is a possible error when spicc clk divider register value is 0.

It's easy and effective to resolve this problem with this flag.

Change-Id: I046f3ee6e35b98211a13be3390b847a5a75ec3c8
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
drivers/clk/clk-divider.c
include/linux/clk-provider.h

index 96386ffc84835f121c2888e3c67a9b230173db64..216d629689576c3a3413e66cbbf291054269991c 100644 (file)
@@ -271,6 +271,10 @@ static int _next_div(const struct clk_div_table *table, int div,
                return __roundup_pow_of_two(div);
        if (table)
                return _round_up_table(table, div);
+#ifdef CONFIG_AMLOGIC_MODIFY
+       if ((flags & CLK_DIVIDER_PROHIBIT_ZERO) && (div == 1))
+               div++;
+#endif
 
        return div;
 }
index a428aec36aceeb22da48e9d3d755d2423e71969b..9116cb293c7d145c21b85252b8f444c1dfad3c50 100644 (file)
@@ -385,6 +385,8 @@ struct clk_div_table {
  * CLK_DIVIDER_MAX_AT_ZERO - For dividers which are like CLK_DIVIDER_ONE_BASED
  *     except when the value read from the register is zero, the divisor is
  *     2^width of the field.
+ * CLK_DIVIDER_PROHIBIT_ZERO - Prohibit value 0 of register(no bypass, enable by
+ *     CONFIG_AMLOGIC_MODIFY).
  */
 struct clk_divider {
        struct clk_hw   hw;
@@ -405,6 +407,9 @@ struct clk_divider {
 #define CLK_DIVIDER_ROUND_CLOSEST      BIT(4)
 #define CLK_DIVIDER_READ_ONLY          BIT(5)
 #define CLK_DIVIDER_MAX_AT_ZERO                BIT(6)
+#ifdef CONFIG_AMLOGIC_MODIFY
+#define CLK_DIVIDER_PROHIBIT_ZERO      BIT(7)
+#endif
 
 extern const struct clk_ops clk_divider_ops;
 extern const struct clk_ops clk_divider_ro_ops;