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perf/x86/intel/pt: Fix mask of num_address_ranges
author
Xiaoyao Li
<xiaoyao.li@intel.com>
Tue, 24 Aug 2021 04:06:22 +0000
(12:06 +0800)
committer
Greg Kroah-Hartman
<gregkh@linuxfoundation.org>
Wed, 22 Sep 2021 09:45:14 +0000
(11:45 +0200)
[ Upstream commit
c53c6b7409f4cd9e542991b53d597fbe2751d7db
]
Per SDM, bit 2:0 of CPUID(0x14,1).EAX[2:0] reports the number of
configurable address ranges for filtering, not bit 1:0.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Link:
https://lkml.kernel.org/r/20210824040622.4081502-1-xiaoyao.li@intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/x86/events/intel/pt.c
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diff --git
a/arch/x86/events/intel/pt.c
b/arch/x86/events/intel/pt.c
index 0661227d935c42e1d61fe0fde4f55d7fb4f62deb..990ca9614b2318dec9c38e148b3445f0f72b5836 100644
(file)
--- a/
arch/x86/events/intel/pt.c
+++ b/
arch/x86/events/intel/pt.c
@@
-69,7
+69,7
@@
static struct pt_cap_desc {
PT_CAP(topa_multiple_entries, 0, CPUID_ECX, BIT(1)),
PT_CAP(single_range_output, 0, CPUID_ECX, BIT(2)),
PT_CAP(payloads_lip, 0, CPUID_ECX, BIT(31)),
- PT_CAP(num_address_ranges, 1, CPUID_EAX, 0x
3
),
+ PT_CAP(num_address_ranges, 1, CPUID_EAX, 0x
7
),
PT_CAP(mtc_periods, 1, CPUID_EAX, 0xffff0000),
PT_CAP(cycle_thresholds, 1, CPUID_EBX, 0xffff),
PT_CAP(psb_periods, 1, CPUID_EBX, 0xffff0000),