media: v4l: fwnode: The clock lane is the first lane in lane_polarities

The clock lane is the first lane in the lane_polarities array. Reflect this
consistently by putting the number of data lanes after the number of clock
lanes.

Fixes: 4ee236219f6d ("media: v4l2-fwnode: suppress a warning at OF parsing logic")

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>

diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c
index 3f8eed008700f817fb879c5d62e8033e8cfd7a44..df7169b5ed8cbe0c4631893e54147cd157cffdd9 100644 (file)
--- a/drivers/media/v4l2-core/v4l2-fwnode.c
+++ b/drivers/media/v4l2-core/v4l2-fwnode.c
@@ -48,7 +48,7 @@ static int v4l2_fwnode_endpoint_parse_csi2_bus(struct fwnode_handle *fwnode,
 
        rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0);
        if (rval > 0) {
-               u32 array[MAX_DATA_LANES + 1];
+               u32 array[1 + MAX_DATA_LANES];
 
                bus->num_data_lanes = min_t(int, MAX_DATA_LANES, rval);
 

diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h
index cb34dcb0bb658aff97e15ba0490d2658bbd3bee7..08e743fb79446ec73f0ab9a393c6f07c2640b3fe 100644 (file)
--- a/include/media/v4l2-fwnode.h
+++ b/include/media/v4l2-fwnode.h
@@ -42,7 +42,7 @@ struct v4l2_fwnode_bus_mipi_csi2 {
        unsigned char data_lanes[MAX_DATA_LANES];
        unsigned char clock_lane;
        unsigned short num_data_lanes;
-       bool lane_polarities[MAX_DATA_LANES + 1];
+       bool lane_polarities[1 + MAX_DATA_LANES];
 };
 
 /**