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OMAPDSS: fix AM43xx minimum pixel clock divider
authorTomi Valkeinen <tomi.valkeinen@ti.com>
Thu, 25 Sep 2014 17:56:43 +0000 (17:56 +0000)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Wed, 25 Feb 2015 13:03:28 +0000 (15:03 +0200)
AM43xx supports pixel clock divider of 1, just like all OMAP3+ SoCs. Fix
the minimum divider value.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
drivers/video/fbdev/omap2/dss/dss_features.c patch | blob | blame | history

diff --git a/drivers/video/fbdev/omap2/dss/dss_features.c b/drivers/video/fbdev/omap2/dss/dss_features.c
index 376270b777f886e8109b69650f7a8f24d9bc7241..b0b6dfd657bfb0311e9e1a7abf382a02d0190655 100644 (file)
--- a/drivers/video/fbdev/omap2/dss/dss_features.c
+++ b/drivers/video/fbdev/omap2/dss/dss_features.c
@@ -440,7 +440,7 @@ static const struct dss_param_range omap3_dss_param_range[] = {
 
 static const struct dss_param_range am43xx_dss_param_range[] = {
        [FEAT_PARAM_DSS_FCK]                    = { 0, 200000000 },
-       [FEAT_PARAM_DSS_PCD]                    = { 2, 255 },
+       [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
        [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
        [FEAT_PARAM_LINEWIDTH]                  = { 1, 1024 },
 };