extern void e820__reserve_setup_data(void);
extern void e820__finish_early_params(void);
-extern void e820_reserve_resources(void);
-extern void e820_reserve_resources_late(void);
+extern void e820__reserve_resources(void);
+extern void e820__reserve_resources_late(void);
extern void e820__memory_setup(void);
extern void e820__memory_setup_extended(u64 phys_addr, u32 data_len);
}
/*
- * e820_reserve_resources_late protect stolen RAM already
+ * e820__reserve_resources_late() protects stolen RAM already:
*/
pci_mem_start = gapstart;
static struct resource __initdata *e820_res;
-void __init e820_reserve_resources(void)
+void __init e820__reserve_resources(void)
{
int i;
struct resource *res;
res->desc = e820_type_to_iores_desc(entry);
/*
- * don't register the region that could be conflicted with
- * pci device BAR resource and insert them later in
- * pcibios_resource_survey()
+ * Don't register the region that could be conflicted with
+ * PCI device BAR resources and insert them later in
+ * pcibios_resource_survey():
*/
if (do_mark_busy(entry->type, res)) {
res->flags |= IORESOURCE_BUSY;
}
}
-/* How much should we pad RAM ending depending on where it is? */
+/*
+ * How much should we pad the end of RAM, depending on where it is?
+ */
static unsigned long __init ram_alignment(resource_size_t pos)
{
unsigned long mb = pos >> 20;
#define MAX_RESOURCE_SIZE ((resource_size_t)-1)
-void __init e820_reserve_resources_late(void)
+void __init e820__reserve_resources_late(void)
{
int i;
struct resource *res;
list_for_each_entry(bus, &pci_root_buses, node)
pcibios_allocate_resources(bus, 1);
- e820_reserve_resources_late();
+ e820__reserve_resources_late();
/*
* Insert the IO APIC resources after PCI initialization has
* occurred to handle IO APICS that are mapped in on a BAR in