ARM: dts: pfla02: Add UART1 (uart3)

The pins labeled UART1 on the module connector are wired to i.MX6 uart3.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index 69361771274c3090bee841eba18481641eec8218..faa3494a69d4e314443ce6cbd9e58790f6b39cb1 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -235,6 +235,15 @@
                        >;
                };
 
+               pinctrl_uart3: uart3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
+                               MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
+                               MX6QDL_PAD_EIM_D30__UART3_RTS_B         0x1b0b1
+                               MX6QDL_PAD_EIM_D31__UART3_CTS_B         0x1b0b1
+                       >;
+               };
+
                pinctrl_uart4: uart4grp {
                        fsl,pins = <
                                MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
@@ -302,6 +311,12 @@
        status = "disabled";
 };
 
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       status = "disabled";
+};
+
 &uart4 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart4>;