#include <mach_apic.h>
#include <asm/genapic.h>
#endif
+
#include <asm/pda.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
return 1;
}
-
void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
{
unsigned int n, dummy, ebx, ecx, edx, l2size;
#ifdef CONFIG_X86_64
c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
#else
-
/* do processor-specific cache resizing */
if (this_cpu->c_size_cache)
l2size = this_cpu->c_size_cache(c, l2size);
if (!cpu_has(c, X86_FEATURE_HT))
return;
+
if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
goto out;
}
}
-
static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
{
u32 tfms, xlvl;
/* Intel-defined flags: level 0x00000001 */
if (c->cpuid_level >= 0x00000001) {
u32 capability, excap;
-
cpuid(0x00000001, &tfms, &ebx, &excap, &capability);
c->x86_capability[0] = capability;
c->x86_capability[4] = excap;
}
#endif
}
-
/*
* Do minimum CPU detection early.
* Fields really needed: vendor, cpuid_level, family, model, mask,
*/
static void __init early_identify_cpu(struct cpuinfo_x86 *c)
{
-
#ifdef CONFIG_X86_64
c->x86_clflush_size = 64;
#else
/* Init Machine Check Exception if available. */
mcheck_init(c);
#endif
+
select_idle_routine(c);
#if defined(CONFIG_NUMA) && defined(CONFIG_X86_64)
numa_add_cpu(smp_processor_id());
#endif
-
}
void __init identify_boot_cpu(void)