arm/imx6q: add device tree machine support
authorShawn Guo <shawn.guo@linaro.org>
Tue, 6 Sep 2011 07:05:25 +0000 (15:05 +0800)
committerArnd Bergmann <arnd@arndb.de>
Mon, 31 Oct 2011 13:26:26 +0000 (14:26 +0100)
It adds generic device tree based machine support for imx6q.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/mach-imx/Makefile
arch/arm/mach-imx/mach-imx6q.c [new file with mode: 0644]
arch/arm/mm/Kconfig
arch/arm/plat-mxc/include/mach/common.h

index f1098507a887c158459f2a5aadb32641959b2dc6..994ae82ca28199d04008e9048f1eb692ed58343f 100644 (file)
@@ -70,4 +70,4 @@ AFLAGS_head-v7.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SMP) += platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
 obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
-obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o
+obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
new file mode 100644 (file)
index 0000000..8bf5fa3
--- /dev/null
@@ -0,0 +1,84 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/hardware/gic.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <mach/common.h>
+#include <mach/hardware.h>
+
+static void __init imx6q_init_machine(void)
+{
+       of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+
+       imx6q_pm_init();
+}
+
+static void __init imx6q_map_io(void)
+{
+       imx_lluart_map_io();
+       imx_scu_map_io();
+}
+
+static void __init imx6q_gpio_add_irq_domain(struct device_node *np,
+                               struct device_node *interrupt_parent)
+{
+       static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
+                                  32 * 7; /* imx6q gets 7 gpio ports */
+
+       irq_domain_add_simple(np, gpio_irq_base);
+       gpio_irq_base += 32;
+}
+
+static const struct of_device_id imx6q_irq_match[] __initconst = {
+       { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+       { .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
+       { /* sentinel */ }
+};
+
+static void __init imx6q_init_irq(void)
+{
+       l2x0_of_init(0, ~0UL);
+       imx_src_init();
+       imx_gpc_init();
+       of_irq_init(imx6q_irq_match);
+}
+
+static void __init imx6q_timer_init(void)
+{
+       mx6q_clocks_init();
+}
+
+static struct sys_timer imx6q_timer = {
+       .init = imx6q_timer_init,
+};
+
+static const char *imx6q_dt_compat[] __initdata = {
+       "fsl,imx6q-sabreauto",
+       NULL,
+};
+
+DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
+       .map_io         = imx6q_map_io,
+       .init_irq       = imx6q_init_irq,
+       .handle_irq     = imx6q_handle_irq,
+       .timer          = &imx6q_timer,
+       .init_machine   = imx6q_init_machine,
+       .dt_compat      = imx6q_dt_compat,
+MACHINE_END
index 88633fe01a5dcdc2641afdd3d5010948a3263b73..c3ce146e29fe28908c29ada62f1789b678ca4da7 100644 (file)
@@ -822,7 +822,7 @@ config CACHE_L2X0
                   REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \
                   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
                   ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
-                  ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX
+                  ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_MX6
        default y
        select OUTER_CACHE
        select OUTER_CACHE_SYNC
index 6340df2284d7785d4370f65ebdf878e6ed756dd2..607b4623af0c9d41346aaae528bf52127a09dd2f 100644 (file)
@@ -64,6 +64,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
                        unsigned long ckih1, unsigned long ckih2);
 extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
                        unsigned long ckih1, unsigned long ckih2);
+extern int mx6q_clocks_init(void);
 extern struct platform_device *mxc_register_gpio(char *name, int id,
        resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
 extern void mxc_set_cpu_type(unsigned int type);
@@ -101,7 +102,19 @@ void gic_handle_irq(struct pt_regs *);
 
 extern void imx_enable_cpu(int cpu, bool enable);
 extern void imx_set_cpu_jump(int cpu, void *jump_addr);
+#ifdef CONFIG_DEBUG_LL
+extern void imx_lluart_map_io(void);
+#else
+static inline void imx_lluart_map_io(void) {}
+#endif
 #ifdef CONFIG_SMP
 extern void v7_secondary_startup(void);
+extern void imx_scu_map_io(void);
+#else
+static inline void imx_scu_map_io(void) {}
 #endif
+extern void imx_enable_cpu(int cpu, bool enable);
+extern void imx_set_cpu_jump(int cpu, void *jump_addr);
+extern void imx_src_init(void);
+extern void imx_gpc_init(void);
 #endif