drm/i915: rename INSTDONE1 to GEN4_INSTDONE1
authorImre Deak <imre.deak@intel.com>
Wed, 30 Sep 2015 20:00:44 +0000 (23:00 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 2 Oct 2015 12:25:19 +0000 (14:25 +0200)
This register was added on GEN4, by the name INSTDONE_1 whereas the GEN6
specification calls it INSTDONE_2. Keep the original name with a
platform prefix to make it clearer which INSTDONE register instance this
is. Also add a comment about the SNB alternative name.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gpu_error.c
drivers/gpu/drm/i915/i915_reg.h

index 85d9a395376ed0d39c79a06dc76d5ece70c21bd0..2f04e4f2ff3514ee2549becb47289d3f8afd8e03 100644 (file)
@@ -1391,7 +1391,7 @@ void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone)
                instdone[0] = I915_READ(GEN2_INSTDONE);
        else if (IS_GEN4(dev) || IS_GEN5(dev) || IS_GEN6(dev)) {
                instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));
-               instdone[1] = I915_READ(INSTDONE1);
+               instdone[1] = I915_READ(GEN4_INSTDONE1);
        } else if (INTEL_INFO(dev)->gen >= 7) {
                instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));
                instdone[1] = I915_READ(GEN7_SC_INSTDONE);
index 5d2da1e6ea66be63d84f76dd66bf480b1815dbba..a1c313fbffb95d6642fe2cd43ecc6c90328678ef 100644 (file)
@@ -1611,7 +1611,7 @@ enum skl_disp_power_wells {
 #define RING_INSTPM(base)      ((base)+0xc0)
 #define RING_MI_MODE(base)     ((base)+0x9c)
 #define INSTPS         0x02070 /* 965+ only */
-#define INSTDONE1      0x0207c /* 965+ only */
+#define GEN4_INSTDONE1 0x0207c /* 965+ only, aka INSTDONE_2 on SNB */
 #define ACTHD_I965     0x02074
 #define HWS_PGA                0x02080
 #define HWS_ADDRESS_MASK       0xfffff000