drm/i915/gen9: Implement WaForceEnableNonCoherent

v2: Don't add WaHdcDisableFetchWhenMasked. Add stepping check for
WaForceEnableNonCoherent

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index e35b341c3cef9e269ae158c4c4a661c9dd64319b..573b80f0c1536e970f7693b8ff283316e298091d 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -902,6 +902,17 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
                                  GEN9_ENABLE_YV12_BUGFIX);
        }
 
+       if (INTEL_REVID(dev) <= SKL_REVID_D0) {
+               /*
+                *Use Force Non-Coherent whenever executing a 3D context. This
+                * is a workaround for a possible hang in the unlikely event
+                * a TLB invalidation occurs during a PSD flush.
+                */
+               /* WaForceEnableNonCoherent:skl */
+               WA_SET_BIT_MASKED(HDC_CHICKEN0,
+                                 HDC_FORCE_NON_COHERENT);
+       }
+
        /* Wa4x4STCOptimizationDisable:skl */
        WA_SET_BIT_MASKED(CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE);