powerpc/mm/hash: Add helper for finding SLBE LLP encoding

Replace opencoding of the same at multiple places with the helper.
No functional change with this patch.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
index 032e9f0bc7084099f031fe37a43e2846103be095..287a656ceb5794f728c495dd4e1b841fdc47c8d5 100644 (file)
--- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
@@ -191,6 +191,15 @@ static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize)
        BUG();
 }
 
+static inline unsigned long get_sllp_encoding(int psize)
+{
+       unsigned long sllp;
+
+       sllp = ((mmu_psize_defs[psize].sllp & SLB_VSID_L) >> 6) |
+               ((mmu_psize_defs[psize].sllp & SLB_VSID_LP) >> 4);
+       return sllp;
+}
+
 #endif /* __ASSEMBLY__ */
 
 /*

diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h
index 1f4497fb5b83adb5797e258509f2cf8edeaf21c4..88d17b4ea9c83177902a5c72a7ac344ba01c55d3 100644 (file)
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -181,8 +181,7 @@ static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
 
        switch (b_psize) {
        case MMU_PAGE_4K:
-               sllp = ((mmu_psize_defs[a_psize].sllp & SLB_VSID_L) >> 6) |
-                       ((mmu_psize_defs[a_psize].sllp & SLB_VSID_LP) >> 4);
+               sllp = get_sllp_encoding(a_psize);
                rb |= sllp << 5;        /*  AP field */
                rb |= (va_low & 0x7ff) << 12;   /* remaining 11 bits of AVA */
                break;

diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 88ce7d21232090fe1d16d91bffd41eda311716f3..d2d8efd79cbfd2173979b6f5ed6b26f2d54338f0 100644 (file)
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -72,8 +72,7 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
                /* clear out bits after (52) [0....52.....63] */
                va &= ~((1ul << (64 - 52)) - 1);
                va |= ssize << 8;
-               sllp = ((mmu_psize_defs[apsize].sllp & SLB_VSID_L) >> 6) |
-                       ((mmu_psize_defs[apsize].sllp & SLB_VSID_LP) >> 4);
+               sllp = get_sllp_encoding(apsize);
                va |= sllp << 5;
                asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2)
                             : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206)
@@ -122,8 +121,7 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)
                /* clear out bits after(52) [0....52.....63] */
                va &= ~((1ul << (64 - 52)) - 1);
                va |= ssize << 8;
-               sllp = ((mmu_psize_defs[apsize].sllp & SLB_VSID_L) >> 6) |
-                       ((mmu_psize_defs[apsize].sllp & SLB_VSID_LP) >> 4);
+               sllp = get_sllp_encoding(apsize);
                va |= sllp << 5;
                asm volatile(".long 0x7c000224 | (%0 << 11) | (0 << 21)"
                             : : "r"(va) : "memory");