[ARM] 5021/1: at91: buildfix for sam9263 + PM
authorDavid Brownell <david-b@pacbell.net>
Thu, 24 Apr 2008 19:58:33 +0000 (20:58 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 28 Apr 2008 16:03:34 +0000 (17:03 +0100)
Build fix for power management on at91sam9263:  it has two memory
controllers instead of just one, so it might have two banks of
DRAM to put into selfrefresh mode.  For now we continue to assume
only the first bank is populated.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-at91/pm.c

index 39733b6992aa3126ee5e715dbaa0ef97faceefd3..aa863c1577087fa1bb0ba8ea5d26d8b37572c96b 100644 (file)
@@ -61,6 +61,15 @@ static inline void sdram_selfrefresh_enable(void)
 #else
 #include <asm/arch/at91sam9_sdramc.h>
 
+#ifdef CONFIG_ARCH_AT91SAM9263
+/*
+ * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
+ * handle those cases both here and in the Suspend-To-RAM support.
+ */
+#define        AT91_SDRAMC     AT91_SDRAMC0
+#warning Assuming EB1 SDRAM controller is *NOT* used
+#endif
+
 static u32 saved_lpr;
 
 static inline void sdram_selfrefresh_enable(void)
@@ -75,11 +84,6 @@ static inline void sdram_selfrefresh_enable(void)
 
 #define sdram_selfrefresh_disable()    at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
 
-/*
- * FIXME: The AT91SAM9263 has a second EBI controller which may have
- *        additional SDRAM.  pm_slowclock.S will require a similar fix.
- */
-
 #endif