drm/nv50: fix alignment of per-channel fifo cache
authorBen Skeggs <bskeggs@redhat.com>
Sun, 17 Jan 2010 22:33:04 +0000 (08:33 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Sun, 17 Jan 2010 23:56:19 +0000 (09:56 +1000)
GPU pointer to the structure is shifted right by 10 bits, so we need to
align to 1024 bytes, not 256.

Reported-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nv50_fifo.c

index 39caf167587d130ae4bf6346342818550c653f80..32b244bcb482e5e71535391c7afcc68a7d63c008 100644 (file)
@@ -272,7 +272,7 @@ nv50_fifo_create_context(struct nouveau_channel *chan)
                        return ret;
                ramfc = chan->ramfc->gpuobj;
 
-               ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 4096, 256,
+               ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 4096, 1024,
                                             0, &chan->cache);
                if (ret)
                        return ret;