drm/i915/gen2: Add an ID for the display pipes power well

Make the I830 power well ID assignment explicit for consistency.

v2:
- s/GEN2/I830/ in the comment, since other GEN2s don't have the power
  well. (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170711204236.5618-2-imre.deak@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index aee40eecf688a85b376cd55f6f72ae9358f0645a..ef0c1a86a52f7c02f2edb78ca5eacc11750002ae 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1072,6 +1072,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
  * power wells their value must stay fixed.
  */
 enum i915_power_well_id {
+       /*
+        * I830
+        *  - custom power well
+        */
+       I830_DISP_PW_PIPES = 0,
+
        /*
         * VLV/CHV
         *  - PUNIT_REG_PWRGT_CTRL (bit: id*2),

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index bbade8a5918f4637eee929002ce4651093e02335..c36ec160b79f98ca4b652a97fdcae1eaea005b3b 100644 (file)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -2036,6 +2036,7 @@ static struct i915_power_well i830_power_wells[] = {
                .name = "pipes",
                .domains = I830_PIPES_POWER_DOMAINS,
                .ops = &i830_pipes_power_well_ops,
+               .id = I830_DISP_PW_PIPES,
        },
 };