select PLAT_VERSATILE_CLCD
select PLAT_VERSATILE_FPGA_IRQ
select ARM_TIMER_SP804
- select MULTI_IRQ_HANDLER
help
This enables support for ARM Ltd Versatile board.
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
- select MULTI_IRQ_HANDLER
help
This enables support for the Cirrus EP93xx series of CPUs.
select CPU_ARM926T
select ARM_VIC
select GENERIC_CLOCKEVENTS
- select MULTI_IRQ_HANDLER
help
This enables support for systems based on the Hilscher NetX Soc
select GENERIC_GPIO
select HAVE_SCHED_CLOCK
select HAVE_TCM
- select MULTI_IRQ_HANDLER
select NO_IOPORT
select USE_OF
help
select SAMSUNG_GPIOLIB_4BIT
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
- select MULTI_IRQ_HANDLER
help
Samsung S3C64XX series based systems
select HAVE_SCHED_CLOCK
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
- select MULTI_IRQ_HANDLER
help
Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
SMDK6450.
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_WATCHDOG if WATCHDOG
- select MULTI_IRQ_HANDLER
help
Samsung S5PC100 series based systems
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_MEMORY_H
- select MULTI_IRQ_HANDLER
help
Samsung S5PV210/S5PC110 series based systems
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
select NEED_MACH_MEMORY_H
- select MULTI_IRQ_HANDLER
help
Support for ST-Ericsson U300 series mobile platforms.
select CLKDEV_LOOKUP
select GENERIC_CLOCKEVENTS
select ARCH_REQUIRE_GPIOLIB
- select MULTI_IRQ_HANDLER
help
Support for the Nomadik platform by ST-Ericsson
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
select HAVE_CLK
- select MULTI_IRQ_HANDLER
help
Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
config ARM_VIC
select IRQ_DOMAIN
+ select MULTI_IRQ_HANDLER
bool
config ARM_VIC_NR
}
#endif /* CONFIG OF */
-#ifdef CONFIG_MULTI_IRQ_HANDLER
/*
* Handle each interrupt in a single VIC. Returns non-zero if we've
* handled at least one interrupt. This does a single read of the
handled |= handle_one_vic(&vic_devices[i], regs);
} while (handled);
}
-#endif /* CONFIG_MULTI_IRQ_HANDLER */
+++ /dev/null
-/* arch/arm/include/asm/entry-macro-vic2.S
- *
- * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Low-level IRQ helper macros for a device with two VICs
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
-*/
-
-/* This should be included from <mach/entry-macro.S> with the necessary
- * defines for virtual addresses and IRQ bases for the two vics.
- *
- * The code needs the following defined:
- * IRQ_VIC0_BASE IRQ number of VIC0's first IRQ
- * IRQ_VIC1_BASE IRQ number of VIC1's first IRQ
- * VA_VIC0 Virtual address of VIC0
- * VA_VIC1 Virtual address of VIC1
- *
- * Note, code assumes VIC0's virtual address is an ARM immediate constant
- * away from VIC1.
-*/
-
-#include <asm/hardware/vic.h>
-
- .macro disable_fiq
- .endm
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =VA_VIC0
- .endm
-
- .macro arch_ret_to_user, tmp1, tmp2
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-
- @ check the vic0
- mov \irqnr, #IRQ_VIC0_BASE + 31
- ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
- teq \irqstat, #0
-
- @ otherwise try vic1
- addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
- addeq \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
- ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
- teqeq \irqstat, #0
-
- clzne \irqstat, \irqstat
- subne \irqnr, \irqnr, \irqstat
- .endm