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drm/i915: Unlock PPS registers after GPU reset
author
Imre Deak
<imre.deak@intel.com>
Wed, 14 Sep 2016 10:04:13 +0000
(13:04 +0300)
committer
Jani Nikula
<jani.nikula@intel.com>
Mon, 10 Oct 2016 13:06:35 +0000
(16:06 +0300)
Reapply the PPS register unlock workaround after GPU reset on platforms
where the reset clobbers the display HW state. This at least gets rid of
the related WARN during LVDS encoder enabling on PNV.
Fixes:
ed6143b8f75
("drm/i915/lvds: Restore initial HW state during encoder enabling")
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link:
http://patchwork.freedesktop.org/patch/msgid/1473847453-4771-1-git-send-email-imre.deak@intel.com
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
(cherry picked from commit
51f592050a523fc5882f9b8b4e9259422e41e848
)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_display.c
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diff --git
a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index ad8d712ae84c044bbd65fa48c3f510590a97016f..992ddf82fa147659ba5eb79e4dbb26e6ba69241e 100644
(file)
--- a/
drivers/gpu/drm/i915/intel_display.c
+++ b/
drivers/gpu/drm/i915/intel_display.c
@@
-3629,6
+3629,7
@@
void intel_finish_reset(struct drm_i915_private *dev_priv)
intel_runtime_pm_disable_interrupts(dev_priv);
intel_runtime_pm_enable_interrupts(dev_priv);
+ intel_pps_unlock_regs_wa(dev_priv);
intel_modeset_init_hw(dev);
spin_lock_irq(&dev_priv->irq_lock);