MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions
authorMarkos Chandras <markos.chandras@imgtec.com>
Wed, 26 Nov 2014 15:03:54 +0000 (15:03 +0000)
committerMarkos Chandras <markos.chandras@imgtec.com>
Tue, 17 Feb 2015 15:37:34 +0000 (15:37 +0000)
MIPS R6 uses the <R6 DADDI opcode for the new BNVC, BNEC and
BNEZLAC instructions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
arch/mips/include/uapi/asm/inst.h
arch/mips/kernel/branch.c
arch/mips/math-emu/cp1emu.c

index 782af0f834210291cc43d1a146aec3065789c557..78335414b18a0443f8397a0da7a40ed2e0c2c33d 100644 (file)
@@ -25,7 +25,7 @@ enum major_op {
        andi_op, ori_op, xori_op, lui_op,
        cop0_op, cop1_op, cop2_op, cop1x_op,
        beql_op, bnel_op, blezl_op, bgtzl_op,
-       daddi_op, daddiu_op, ldl_op, ldr_op,
+       daddi_op, cbcond1_op = daddi_op, daddiu_op, ldl_op, ldr_op,
        spec2_op, jalx_op, mdmx_op, spec3_op,
        lb_op, lh_op, lwl_op, lw_op,
        lbu_op, lhu_op, lwr_op, lwu_op,
index 80a073ced200729bc65d4ad7990f14ab5621bd18..37c75275734676a49a41727f9089dae019c886fc 100644 (file)
@@ -791,12 +791,16 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
                break;
 #endif
        case cbcond0_op:
+       case cbcond1_op:
                /* Only valid for MIPS R6 */
                if (!cpu_has_mips_r6) {
                        ret = -SIGILL;
                        break;
                }
-               /* Compact branches: bovc, beqc, beqzalc */
+               /*
+                * Compact branches:
+                * bovc, beqc, beqzalc, bnvc, bnec, bnezlac
+                */
                if (insn.i_format.rt && !insn.i_format.rs)
                        regs->regs[31] = epc + 4;
                regs->cp0_epc += 8;
index c115d969664bc9056562a81aac8618cb68bdb270..0d8407b51470c1ee92d069d0d744cd520b9e0c5e 100644 (file)
@@ -624,6 +624,7 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
                                dec_insn.next_pc_inc;
                return 1;
        case cbcond0_op:
+       case cbcond1_op:
                if (!cpu_has_mips_r6)
                        break;
                if (insn.i_format.rt && !insn.i_format.rs)