drm/i915: blow away userspace mappings before fence change
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 1 Feb 2010 12:59:17 +0000 (13:59 +0100)
committerEric Anholt <eric@anholt.net>
Mon, 22 Feb 2010 16:54:42 +0000 (11:54 -0500)
This aligns it with the other user of i915_gem_clear_fence_reg,
which blows away the mapping before changing the fence reg.

Only affects userspace if it races against itself when changing
tiling parameters, i.e. behaviour is undefined, anyway.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_gem_tiling.c

index a236bfb30844271eedb9ff5c18c7bdcdfdc6f88f..7b12604a9eb8007b0a1306c30da1eee8d774b8ef 100644 (file)
@@ -2544,6 +2544,12 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj)
        if (obj_priv->fence_reg == I915_FENCE_REG_NONE)
                return 0;
 
+       /* If we've changed tiling, GTT-mappings of the object
+        * need to re-fault to ensure that the correct fence register
+        * setup is in place.
+        */
+       i915_gem_release_mmap(obj);
+
        /* On the i915, GPU access to tiled buffers is via a fence,
         * therefore we must wait for any outstanding access to complete
         * before clearing the fence.
index f308fdf437254fc4bad0b02e6909f6d9c50b952e..b0cbe3a62f84997ef2968688c25178c47aaed148 100644 (file)
@@ -371,12 +371,6 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
                        goto err;
                }
 
-               /* If we've changed tiling, GTT-mappings of the object
-                * need to re-fault to ensure that the correct fence register
-                * setup is in place.
-                */
-               i915_gem_release_mmap(obj);
-
                obj_priv->tiling_mode = args->tiling_mode;
                obj_priv->stride = args->stride;
        }