ARM: imx6q: add clock for apbh-dma
authorHuang Shijie <shijie8@gmail.com>
Thu, 7 Jun 2012 01:22:58 +0000 (21:22 -0400)
committerShawn Guo <shawn.guo@linaro.org>
Mon, 2 Jul 2012 02:17:31 +0000 (10:17 +0800)
add clock for apbh-dma.

Signed-off-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/mach-imx/clk-imx6q.c

index e1a17ac7b3b48419a8ff1f9dadfa5de03f5fd852..b2a76d2b1941c7087aeda7bb0ccb608d876db9f5 100644 (file)
@@ -318,7 +318,7 @@ int __init mx6q_clocks_init(void)
        clk[ahb]               = imx_clk_busy_divider("ahb",               "periph",      base + 0x14, 10,  3,   base + 0x48, 1);
 
        /*                                name             parent_name          reg         shift */
-       clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "ahb",               base + 0x68, 4);
+       clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "usdhc3",            base + 0x68, 4);
        clk[asrc]         = imx_clk_gate2("asrc",          "asrc_podf",         base + 0x68, 6);
        clk[can1_ipg]     = imx_clk_gate2("can1_ipg",      "ipg",               base + 0x68, 14);
        clk[can1_serial]  = imx_clk_gate2("can1_serial",   "can_root",          base + 0x68, 16);
@@ -394,6 +394,7 @@ int __init mx6q_clocks_init(void)
        clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
        clk_register_clkdev(clk[twd], NULL, "smp_twd");
        clk_register_clkdev(clk[usboh3], NULL, "usboh3");
+       clk_register_clkdev(clk[apbh_dma], NULL, "110000.dma-apbh");
        clk_register_clkdev(clk[uart_serial], "per", "2020000.serial");
        clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial");
        clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");