Add/Fix missing bit of R4600 hit cacheop workaround.
authorThiemo Seufer <ths@networkno.de>
Fri, 9 Sep 2005 20:26:54 +0000 (20:26 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Sat, 29 Oct 2005 18:32:18 +0000 (19:32 +0100)
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/c-r4k.c
arch/mips/mm/pg-r4k.c

index 586baf29fe8872a67c59b4736288d14e60db5af2..aa87ae55217081a6fbdc0891d110c8270e74cd01 100644 (file)
@@ -481,6 +481,7 @@ static inline void local_r4k_flush_icache_range(void *args)
                if (end - start > dcache_size) {
                        r4k_blast_dcache();
                } else {
+                       R4600_HIT_CACHEOP_WAR_IMPL;
                        addr = start & ~(dc_lsize - 1);
                        aend = (end - 1) & ~(dc_lsize - 1);
 
index c9e6ee2a8a2391ee25e7046427593e3025eb5aee..f51e180072e3a9f3e737437d7113948310fbe09d 100644 (file)
@@ -209,7 +209,7 @@ static inline void build_cdex_p(void)
        }
 
        if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
-               build_insn_word(0x8c200000);    /* lw      $zero, ($at) */
+               build_insn_word(0x3c01a000);    /* lui     $at, 0xa000  */
 
        mi.c_format.opcode     = cache_op;
        mi.c_format.rs         = 4;             /* $a0 */