Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
nvidia,ac97-controller = <&ac97>;
- clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+ clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
- clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+ clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
nvidia,spkr-en-gpios = <&wm8903 2 0>;
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
- clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+ clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
- clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+ clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
nvidia,spkr-en-gpios = <&wm8903 2 0>;
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
- clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+ clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
nvidia,spkr-en-gpios = <&wm8903 2 0>;
nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
- clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+ clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
nvidia,spkr-en-gpios = <&wm8903 2 0>;
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
- clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+ clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,audio-codec = <&codec>;
- clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+ clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
nvidia,int-mic-en-gpios = <&gpio 184 0>; /* gpio PX0 */
nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
- clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+ clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,audio-codec = <&codec>;
- clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+ clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
compatible = "nvidia,tegra20-usb-phy";
reg = <0xc5004400 0x3c00>;
phy_type = "ulpi";
- clocks = <&tegra_car 94>, <&tegra_car 127>;
+ clocks = <&tegra_car 93>, <&tegra_car 127>;
clock-names = "phy", "pll_u";
};