qed*: Management firmware - notifications and defaults
authorSudarsana Kalluru <Sudarsana.Kalluru@cavium.com>
Mon, 31 Oct 2016 05:14:21 +0000 (07:14 +0200)
committerDavid S. Miller <davem@davemloft.net>
Mon, 31 Oct 2016 19:52:35 +0000 (15:52 -0400)
Management firmware is interested in various tidbits about
the driver - including the driver state & several configuration
related fields [MTU, primtary MAC, etc.].
This adds the necessray logic to update MFW with such configurations,
some of which are passed directly via qed while for others APIs
are provide so that qede would be able to later configure if needed.

This also introduces a new default configuration for MTU which would
replace the default inherited by being an ethernet device.

Signed-off-by: Sudarsana Kalluru <Sudarsana.Kalluru@cavium.com>
Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/qlogic/qed/qed.h
drivers/net/ethernet/qlogic/qed/qed_dev.c
drivers/net/ethernet/qlogic/qed/qed_hsi.h
drivers/net/ethernet/qlogic/qed/qed_main.c
drivers/net/ethernet/qlogic/qed/qed_mcp.c
drivers/net/ethernet/qlogic/qed/qed_mcp.h
drivers/net/ethernet/qlogic/qede/qede_ethtool.c
drivers/net/ethernet/qlogic/qede/qede_main.c
include/linux/qed/qed_if.h

index 653bb5735f0c63b979b36004f2e0616289c7c9c9..f20243c1fb0b2ac59ff9ed84914314e47ef1fe5f 100644 (file)
@@ -226,6 +226,7 @@ struct qed_hw_info {
        u32                             port_mode;
        u32                             hw_mode;
        unsigned long           device_capabilities;
+       u16                             mtu;
 };
 
 struct qed_hw_cid_data {
index edae5fc5fccddc095c6f603b2e91525378c777de..33fd69e24baec6694a85f71ff152123096754104 100644 (file)
@@ -1057,8 +1057,10 @@ int qed_hw_init(struct qed_dev *cdev,
                bool allow_npar_tx_switch,
                const u8 *bin_fw_data)
 {
-       u32 load_code, param;
-       int rc, mfw_rc, i;
+       u32 load_code, param, drv_mb_param;
+       bool b_default_mtu = true;
+       struct qed_hwfn *p_hwfn;
+       int rc = 0, mfw_rc, i;
 
        if ((int_mode == QED_INT_MODE_MSI) && (cdev->num_hwfns > 1)) {
                DP_NOTICE(cdev, "MSI mode is not supported for CMT devices\n");
@@ -1074,6 +1076,12 @@ int qed_hw_init(struct qed_dev *cdev,
        for_each_hwfn(cdev, i) {
                struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 
+               /* If management didn't provide a default, set one of our own */
+               if (!p_hwfn->hw_info.mtu) {
+                       p_hwfn->hw_info.mtu = 1500;
+                       b_default_mtu = false;
+               }
+
                if (IS_VF(cdev)) {
                        p_hwfn->b_int_enabled = 1;
                        continue;
@@ -1157,6 +1165,38 @@ int qed_hw_init(struct qed_dev *cdev,
                p_hwfn->hw_init_done = true;
        }
 
+       if (IS_PF(cdev)) {
+               p_hwfn = QED_LEADING_HWFN(cdev);
+               drv_mb_param = (FW_MAJOR_VERSION << 24) |
+                              (FW_MINOR_VERSION << 16) |
+                              (FW_REVISION_VERSION << 8) |
+                              (FW_ENGINEERING_VERSION);
+               rc = qed_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
+                                DRV_MSG_CODE_OV_UPDATE_STORM_FW_VER,
+                                drv_mb_param, &load_code, &param);
+               if (rc)
+                       DP_INFO(p_hwfn, "Failed to update firmware version\n");
+
+               if (!b_default_mtu) {
+                       rc = qed_mcp_ov_update_mtu(p_hwfn, p_hwfn->p_main_ptt,
+                                                  p_hwfn->hw_info.mtu);
+                       if (rc)
+                               DP_INFO(p_hwfn,
+                                       "Failed to update default mtu\n");
+               }
+
+               rc = qed_mcp_ov_update_driver_state(p_hwfn,
+                                                   p_hwfn->p_main_ptt,
+                                                 QED_OV_DRIVER_STATE_DISABLED);
+               if (rc)
+                       DP_INFO(p_hwfn, "Failed to update driver state\n");
+
+               rc = qed_mcp_ov_update_eswitch(p_hwfn, p_hwfn->p_main_ptt,
+                                              QED_OV_ESWITCH_VEB);
+               if (rc)
+                       DP_INFO(p_hwfn, "Failed to update eswitch mode\n");
+       }
+
        return 0;
 }
 
@@ -1801,6 +1841,9 @@ qed_get_hw_info(struct qed_hwfn *p_hwfn,
 
        qed_get_num_funcs(p_hwfn, p_ptt);
 
+       if (qed_mcp_is_init(p_hwfn))
+               p_hwfn->hw_info.mtu = p_hwfn->mcp_info->func_info.mtu;
+
        return qed_hw_get_resc(p_hwfn);
 }
 
@@ -1975,8 +2018,13 @@ int qed_hw_prepare(struct qed_dev *cdev,
 
 void qed_hw_remove(struct qed_dev *cdev)
 {
+       struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
        int i;
 
+       if (IS_PF(cdev))
+               qed_mcp_ov_update_driver_state(p_hwfn, p_hwfn->p_main_ptt,
+                                              QED_OV_DRIVER_STATE_NOT_LOADED);
+
        for_each_hwfn(cdev, i) {
                struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 
index 72eee29c677f153e6ed65fbf0d57436abbe87f84..36de87a1befa82fe01f660665b2ad645ac60cd38 100644 (file)
@@ -8564,6 +8564,15 @@ struct public_drv_mb {
 #define DRV_MSG_CODE_INIT_PHY                  0x22000000
 #define DRV_MSG_CODE_LINK_RESET                        0x23000000
 #define DRV_MSG_CODE_SET_DCBX                  0x25000000
+#define DRV_MSG_CODE_OV_UPDATE_CURR_CFG         0x26000000
+#define DRV_MSG_CODE_OV_UPDATE_BUS_NUM          0x27000000
+#define DRV_MSG_CODE_OV_UPDATE_BOOT_PROGRESS    0x28000000
+#define DRV_MSG_CODE_OV_UPDATE_STORM_FW_VER     0x29000000
+#define DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE     0x31000000
+#define DRV_MSG_CODE_BW_UPDATE_ACK              0x32000000
+#define DRV_MSG_CODE_OV_UPDATE_MTU              0x33000000
+#define DRV_MSG_CODE_OV_UPDATE_WOL              0x38000000
+#define DRV_MSG_CODE_OV_UPDATE_ESWITCH_MODE     0x39000000
 
 #define DRV_MSG_CODE_BW_UPDATE_ACK             0x32000000
 #define DRV_MSG_CODE_NIG_DRAIN                 0x30000000
@@ -8574,6 +8583,13 @@ struct public_drv_mb {
 #define DRV_MSG_CODE_MCP_RESET                 0x00090000
 #define DRV_MSG_CODE_SET_VERSION               0x000f0000
 #define DRV_MSG_CODE_MCP_HALT                   0x00100000
+#define DRV_MSG_CODE_SET_VMAC                   0x00110000
+#define DRV_MSG_CODE_GET_VMAC                   0x00120000
+#define DRV_MSG_CODE_VMAC_TYPE_SHIFT            4
+#define DRV_MSG_CODE_VMAC_TYPE_MASK             0x30
+#define DRV_MSG_CODE_VMAC_TYPE_MAC              1
+#define DRV_MSG_CODE_VMAC_TYPE_WWNN             2
+#define DRV_MSG_CODE_VMAC_TYPE_WWPN             3
 
 #define DRV_MSG_CODE_GET_STATS                  0x00130000
 #define DRV_MSG_CODE_STATS_TYPE_LAN             1
@@ -8589,7 +8605,10 @@ struct public_drv_mb {
 #define DRV_MSG_SEQ_NUMBER_MASK                        0x0000ffff
 
        u32 drv_mb_param;
-#define DRV_MB_PARAM_UNLOAD_WOL_MCP            0x00000001
+#define DRV_MB_PARAM_UNLOAD_WOL_UNKNOWN         0x00000000
+#define DRV_MB_PARAM_UNLOAD_WOL_MCP             0x00000001
+#define DRV_MB_PARAM_UNLOAD_WOL_DISABLED        0x00000002
+#define DRV_MB_PARAM_UNLOAD_WOL_ENABLED         0x00000003
 #define DRV_MB_PARAM_DCBX_NOTIFY_MASK          0x000000FF
 #define DRV_MB_PARAM_DCBX_NOTIFY_SHIFT         3
 
@@ -8602,6 +8621,44 @@ struct public_drv_mb {
 #define DRV_MB_PARAM_LLDP_SEND_MASK            0x00000001
 #define DRV_MB_PARAM_LLDP_SEND_SHIFT           0
 
+#define DRV_MB_PARAM_OV_CURR_CFG_SHIFT         0
+#define DRV_MB_PARAM_OV_CURR_CFG_MASK          0x0000000F
+#define DRV_MB_PARAM_OV_CURR_CFG_NONE          0
+#define DRV_MB_PARAM_OV_CURR_CFG_OS            1
+#define DRV_MB_PARAM_OV_CURR_CFG_VENDOR_SPEC   2
+#define DRV_MB_PARAM_OV_CURR_CFG_OTHER         3
+
+#define DRV_MB_PARAM_OV_STORM_FW_VER_SHIFT     0
+#define DRV_MB_PARAM_OV_STORM_FW_VER_MASK      0xFFFFFFFF
+#define DRV_MB_PARAM_OV_STORM_FW_VER_MAJOR_MASK        0xFF000000
+#define DRV_MB_PARAM_OV_STORM_FW_VER_MINOR_MASK        0x00FF0000
+#define DRV_MB_PARAM_OV_STORM_FW_VER_BUILD_MASK        0x0000FF00
+#define DRV_MB_PARAM_OV_STORM_FW_VER_DROP_MASK 0x000000FF
+
+#define DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE_SHIFT      0
+#define DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE_MASK       0xF
+#define DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE_UNKNOWN    0x1
+#define DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE_NOT_LOADED 0x2
+#define DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE_LOADING    0x3
+#define DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE_DISABLED   0x4
+#define DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE_ACTIVE     0x5
+
+#define DRV_MB_PARAM_OV_MTU_SIZE_SHIFT 0
+#define DRV_MB_PARAM_OV_MTU_SIZE_MASK  0xFFFFFFFF
+
+#define DRV_MB_PARAM_WOL_MASK  (DRV_MB_PARAM_WOL_DEFAULT | \
+                                DRV_MB_PARAM_WOL_DISABLED | \
+                                DRV_MB_PARAM_WOL_ENABLED)
+#define DRV_MB_PARAM_WOL_DEFAULT       DRV_MB_PARAM_UNLOAD_WOL_MCP
+#define DRV_MB_PARAM_WOL_DISABLED      DRV_MB_PARAM_UNLOAD_WOL_DISABLED
+#define DRV_MB_PARAM_WOL_ENABLED       DRV_MB_PARAM_UNLOAD_WOL_ENABLED
+
+#define DRV_MB_PARAM_ESWITCH_MODE_MASK (DRV_MB_PARAM_ESWITCH_MODE_NONE | \
+                                        DRV_MB_PARAM_ESWITCH_MODE_VEB | \
+                                        DRV_MB_PARAM_ESWITCH_MODE_VEPA)
+#define DRV_MB_PARAM_ESWITCH_MODE_NONE 0x0
+#define DRV_MB_PARAM_ESWITCH_MODE_VEB  0x1
+#define DRV_MB_PARAM_ESWITCH_MODE_VEPA 0x2
 
 #define DRV_MB_PARAM_SET_LED_MODE_OPER         0x0
 #define DRV_MB_PARAM_SET_LED_MODE_ON           0x1
index c418360ba02af18b1013ceec4e893af70a44c763..d9fa52a2266752805685f50587ff33cc0fc50862 100644 (file)
@@ -243,6 +243,8 @@ int qed_fill_dev_info(struct qed_dev *cdev,
                                    &dev_info->mfw_rev, NULL);
        }
 
+       dev_info->mtu = QED_LEADING_HWFN(cdev)->hw_info.mtu;
+
        return 0;
 }
 
@@ -1431,6 +1433,76 @@ static int qed_set_led(struct qed_dev *cdev, enum qed_led_mode mode)
        return status;
 }
 
+static int qed_update_drv_state(struct qed_dev *cdev, bool active)
+{
+       struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
+       struct qed_ptt *ptt;
+       int status = 0;
+
+       if (IS_VF(cdev))
+               return 0;
+
+       ptt = qed_ptt_acquire(hwfn);
+       if (!ptt)
+               return -EAGAIN;
+
+       status = qed_mcp_ov_update_driver_state(hwfn, ptt, active ?
+                                               QED_OV_DRIVER_STATE_ACTIVE :
+                                               QED_OV_DRIVER_STATE_DISABLED);
+
+       qed_ptt_release(hwfn, ptt);
+
+       return status;
+}
+
+static int qed_update_mac(struct qed_dev *cdev, u8 *mac)
+{
+       struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
+       struct qed_ptt *ptt;
+       int status = 0;
+
+       if (IS_VF(cdev))
+               return 0;
+
+       ptt = qed_ptt_acquire(hwfn);
+       if (!ptt)
+               return -EAGAIN;
+
+       status = qed_mcp_ov_update_mac(hwfn, ptt, mac);
+       if (status)
+               goto out;
+
+       status = qed_mcp_ov_update_current_config(hwfn, ptt, QED_OV_CLIENT_DRV);
+
+out:
+       qed_ptt_release(hwfn, ptt);
+       return status;
+}
+
+static int qed_update_mtu(struct qed_dev *cdev, u16 mtu)
+{
+       struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
+       struct qed_ptt *ptt;
+       int status = 0;
+
+       if (IS_VF(cdev))
+               return 0;
+
+       ptt = qed_ptt_acquire(hwfn);
+       if (!ptt)
+               return -EAGAIN;
+
+       status = qed_mcp_ov_update_mtu(hwfn, ptt, mtu);
+       if (status)
+               goto out;
+
+       status = qed_mcp_ov_update_current_config(hwfn, ptt, QED_OV_CLIENT_DRV);
+
+out:
+       qed_ptt_release(hwfn, ptt);
+       return status;
+}
+
 static struct qed_selftest_ops qed_selftest_ops_pass = {
        .selftest_memory = &qed_selftest_memory,
        .selftest_interrupt = &qed_selftest_interrupt,
@@ -1465,6 +1537,9 @@ const struct qed_common_ops qed_common_ops_pass = {
        .get_coalesce = &qed_get_coalesce,
        .set_coalesce = &qed_set_coalesce,
        .set_led = &qed_set_led,
+       .update_drv_state = &qed_update_drv_state,
+       .update_mac = &qed_update_mac,
+       .update_mtu = &qed_update_mtu,
 };
 
 void qed_get_protocol_stats(struct qed_dev *cdev,
index bdc9ba92f6d4569a0d391a127245f290ae083924..98dc913fd76d3f8c94363cc80b8b934f4f875eed 100644 (file)
@@ -14,6 +14,7 @@
 #include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/string.h>
+#include <linux/etherdevice.h>
 #include "qed.h"
 #include "qed_dcbx.h"
 #include "qed_hsi.h"
@@ -1068,6 +1069,8 @@ int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
 
        info->ovlan = (u16)(shmem_info.ovlan_stag & FUNC_MF_CFG_OV_STAG_MASK);
 
+       info->mtu = (u16)shmem_info.mtu_size;
+
        DP_VERBOSE(p_hwfn, (QED_MSG_SP | NETIF_MSG_IFUP),
                   "Read configuration from shmem: pause_on_host %02x protocol %02x BW [%02x - %02x] MAC %02x:%02x:%02x:%02x:%02x:%02x wwn port %llx node %llx ovlan %04x\n",
                info->pause_on_host, info->protocol,
@@ -1223,6 +1226,166 @@ int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
        return (cpu_mode & MCP_REG_CPU_MODE_SOFT_HALT) ? -EAGAIN : 0;
 }
 
+int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
+                                    struct qed_ptt *p_ptt,
+                                    enum qed_ov_client client)
+{
+       u32 resp = 0, param = 0;
+       u32 drv_mb_param;
+       int rc;
+
+       switch (client) {
+       case QED_OV_CLIENT_DRV:
+               drv_mb_param = DRV_MB_PARAM_OV_CURR_CFG_OS;
+               break;
+       case QED_OV_CLIENT_USER:
+               drv_mb_param = DRV_MB_PARAM_OV_CURR_CFG_OTHER;
+               break;
+       case QED_OV_CLIENT_VENDOR_SPEC:
+               drv_mb_param = DRV_MB_PARAM_OV_CURR_CFG_VENDOR_SPEC;
+               break;
+       default:
+               DP_NOTICE(p_hwfn, "Invalid client type %d\n", client);
+               return -EINVAL;
+       }
+
+       rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_OV_UPDATE_CURR_CFG,
+                        drv_mb_param, &resp, &param);
+       if (rc)
+               DP_ERR(p_hwfn, "MCP response failure, aborting\n");
+
+       return rc;
+}
+
+int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
+                                  struct qed_ptt *p_ptt,
+                                  enum qed_ov_driver_state drv_state)
+{
+       u32 resp = 0, param = 0;
+       u32 drv_mb_param;
+       int rc;
+
+       switch (drv_state) {
+       case QED_OV_DRIVER_STATE_NOT_LOADED:
+               drv_mb_param = DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE_NOT_LOADED;
+               break;
+       case QED_OV_DRIVER_STATE_DISABLED:
+               drv_mb_param = DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE_DISABLED;
+               break;
+       case QED_OV_DRIVER_STATE_ACTIVE:
+               drv_mb_param = DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE_ACTIVE;
+               break;
+       default:
+               DP_NOTICE(p_hwfn, "Invalid driver state %d\n", drv_state);
+               return -EINVAL;
+       }
+
+       rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_OV_UPDATE_DRIVER_STATE,
+                        drv_mb_param, &resp, &param);
+       if (rc)
+               DP_ERR(p_hwfn, "Failed to send driver state\n");
+
+       return rc;
+}
+
+int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
+                         struct qed_ptt *p_ptt, u16 mtu)
+{
+       u32 resp = 0, param = 0;
+       u32 drv_mb_param;
+       int rc;
+
+       drv_mb_param = (u32)mtu << DRV_MB_PARAM_OV_MTU_SIZE_SHIFT;
+       rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_OV_UPDATE_MTU,
+                        drv_mb_param, &resp, &param);
+       if (rc)
+               DP_ERR(p_hwfn, "Failed to send mtu value, rc = %d\n", rc);
+
+       return rc;
+}
+
+int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
+                         struct qed_ptt *p_ptt, u8 *mac)
+{
+       struct qed_mcp_mb_params mb_params;
+       union drv_union_data union_data;
+       int rc;
+
+       memset(&mb_params, 0, sizeof(mb_params));
+       mb_params.cmd = DRV_MSG_CODE_SET_VMAC;
+       mb_params.param = DRV_MSG_CODE_VMAC_TYPE_MAC <<
+                         DRV_MSG_CODE_VMAC_TYPE_SHIFT;
+       mb_params.param |= MCP_PF_ID(p_hwfn);
+       ether_addr_copy(&union_data.raw_data[0], mac);
+       mb_params.p_data_src = &union_data;
+       rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
+       if (rc)
+               DP_ERR(p_hwfn, "Failed to send mac address, rc = %d\n", rc);
+
+       return rc;
+}
+
+int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
+                         struct qed_ptt *p_ptt, enum qed_ov_wol wol)
+{
+       u32 resp = 0, param = 0;
+       u32 drv_mb_param;
+       int rc;
+
+       switch (wol) {
+       case QED_OV_WOL_DEFAULT:
+               drv_mb_param = DRV_MB_PARAM_WOL_DEFAULT;
+               break;
+       case QED_OV_WOL_DISABLED:
+               drv_mb_param = DRV_MB_PARAM_WOL_DISABLED;
+               break;
+       case QED_OV_WOL_ENABLED:
+               drv_mb_param = DRV_MB_PARAM_WOL_ENABLED;
+               break;
+       default:
+               DP_ERR(p_hwfn, "Invalid wol state %d\n", wol);
+               return -EINVAL;
+       }
+
+       rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_OV_UPDATE_WOL,
+                        drv_mb_param, &resp, &param);
+       if (rc)
+               DP_ERR(p_hwfn, "Failed to send wol mode, rc = %d\n", rc);
+
+       return rc;
+}
+
+int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
+                             struct qed_ptt *p_ptt,
+                             enum qed_ov_eswitch eswitch)
+{
+       u32 resp = 0, param = 0;
+       u32 drv_mb_param;
+       int rc;
+
+       switch (eswitch) {
+       case QED_OV_ESWITCH_NONE:
+               drv_mb_param = DRV_MB_PARAM_ESWITCH_MODE_NONE;
+               break;
+       case QED_OV_ESWITCH_VEB:
+               drv_mb_param = DRV_MB_PARAM_ESWITCH_MODE_VEB;
+               break;
+       case QED_OV_ESWITCH_VEPA:
+               drv_mb_param = DRV_MB_PARAM_ESWITCH_MODE_VEPA;
+               break;
+       default:
+               DP_ERR(p_hwfn, "Invalid eswitch mode %d\n", eswitch);
+               return -EINVAL;
+       }
+
+       rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_OV_UPDATE_ESWITCH_MODE,
+                        drv_mb_param, &resp, &param);
+       if (rc)
+               DP_ERR(p_hwfn, "Failed to send eswitch mode, rc = %d\n", rc);
+
+       return rc;
+}
+
 int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
                    struct qed_ptt *p_ptt, enum qed_led_mode mode)
 {
index dff520ed069bf61d951076bee5b82adf89f95c72..89507190628dbbbccd246adefeac628fb0361186 100644 (file)
@@ -92,6 +92,8 @@ struct qed_mcp_function_info {
 
 #define QED_MCP_VLAN_UNSET              (0xffff)
        u16                             ovlan;
+
+       u16                             mtu;
 };
 
 struct qed_mcp_nvm_common {
@@ -147,6 +149,30 @@ union qed_mcp_protocol_stats {
        struct qed_mcp_rdma_stats rdma_stats;
 };
 
+enum qed_ov_eswitch {
+       QED_OV_ESWITCH_NONE,
+       QED_OV_ESWITCH_VEB,
+       QED_OV_ESWITCH_VEPA
+};
+
+enum qed_ov_client {
+       QED_OV_CLIENT_DRV,
+       QED_OV_CLIENT_USER,
+       QED_OV_CLIENT_VENDOR_SPEC
+};
+
+enum qed_ov_driver_state {
+       QED_OV_DRIVER_STATE_NOT_LOADED,
+       QED_OV_DRIVER_STATE_DISABLED,
+       QED_OV_DRIVER_STATE_ACTIVE
+};
+
+enum qed_ov_wol {
+       QED_OV_WOL_DEFAULT,
+       QED_OV_WOL_DISABLED,
+       QED_OV_WOL_ENABLED
+};
+
 /**
  * @brief - returns the link params of the hw function
  *
@@ -277,6 +303,69 @@ qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
                         struct qed_ptt *p_ptt,
                         struct qed_mcp_drv_version *p_ver);
 
+/**
+ * @brief Notify MFW about the change in base device properties
+ *
+ *  @param p_hwfn
+ *  @param p_ptt
+ *  @param client - qed client type
+ *
+ * @return int - 0 - operation was successful.
+ */
+int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
+                                    struct qed_ptt *p_ptt,
+                                    enum qed_ov_client client);
+
+/**
+ * @brief Notify MFW about the driver state
+ *
+ *  @param p_hwfn
+ *  @param p_ptt
+ *  @param drv_state - Driver state
+ *
+ * @return int - 0 - operation was successful.
+ */
+int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
+                                  struct qed_ptt *p_ptt,
+                                  enum qed_ov_driver_state drv_state);
+
+/**
+ * @brief Send MTU size to MFW
+ *
+ *  @param p_hwfn
+ *  @param p_ptt
+ *  @param mtu - MTU size
+ *
+ * @return int - 0 - operation was successful.
+ */
+int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
+                         struct qed_ptt *p_ptt, u16 mtu);
+
+/**
+ * @brief Send MAC address to MFW
+ *
+ *  @param p_hwfn
+ *  @param p_ptt
+ *  @param mac - MAC address
+ *
+ * @return int - 0 - operation was successful.
+ */
+int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
+                         struct qed_ptt *p_ptt, u8 *mac);
+
+/**
+ * @brief Send WOL mode to MFW
+ *
+ *  @param p_hwfn
+ *  @param p_ptt
+ *  @param wol - WOL mode
+ *
+ * @return int - 0 - operation was successful.
+ */
+int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
+                         struct qed_ptt *p_ptt,
+                         enum qed_ov_wol wol);
+
 /**
  * @brief Set LED status
  *
@@ -546,4 +635,17 @@ int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
 int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
                          struct qed_ptt *p_ptt, u32 mask_parities);
 
+/**
+ * @brief Send eswitch mode to MFW
+ *
+ *  @param p_hwfn
+ *  @param p_ptt
+ *  @param eswitch - eswitch mode
+ *
+ * @return int - 0 - operation was successful.
+ */
+int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
+                             struct qed_ptt *p_ptt,
+                             enum qed_ov_eswitch eswitch);
+
 #endif
index 0100f5c0a4ec3a21eccb81fb923c5c9f66f61f9d..775fdaafd24d45e688f046026037b1fdef4245d3 100644 (file)
@@ -739,6 +739,8 @@ int qede_change_mtu(struct net_device *ndev, int new_mtu)
 
        qede_update_mtu(edev, &args);
 
+       edev->ops->common->update_mtu(edev->cdev, args.mtu);
+
        return 0;
 }
 
index 8488ad36a2b8cf5a209e8d5a6436eed5e57e695c..df0bd0ce2b188a825b2ae1a6fdd8945f99b668db 100644 (file)
@@ -2396,6 +2396,8 @@ static void qede_init_ndev(struct qede_dev *edev)
 
        /* Set network device HW mac */
        ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
+
+       ndev->mtu = edev->dev_info.common.mtu;
 }
 
 /* This function converts from 32b param to two params of level and module
@@ -3751,6 +3753,8 @@ static int qede_open(struct net_device *ndev)
 
        udp_tunnel_get_rx_info(ndev);
 
+       edev->ops->common->update_drv_state(edev->cdev, true);
+
        return 0;
 }
 
@@ -3760,6 +3764,8 @@ static int qede_close(struct net_device *ndev)
 
        qede_unload(edev, QEDE_UNLOAD_NORMAL);
 
+       edev->ops->common->update_drv_state(edev->cdev, false);
+
        return 0;
 }
 
@@ -3820,6 +3826,8 @@ static int qede_set_mac_addr(struct net_device *ndev, void *p)
        if (rc)
                return rc;
 
+       edev->ops->common->update_mac(edev->cdev, addr->sa_data);
+
        /* Add MAC filter according to the new unicast HW MAC address */
        ether_addr_copy(edev->primary_mac, ndev->dev_addr);
        return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
index 8978a60371f4372160d1372510dad00b1c4a76ed..5c909cd02764276fea0a69935981e82e92a5bb61 100644 (file)
@@ -267,6 +267,7 @@ struct qed_dev_info {
        u8              mf_mode;
        bool            tx_switching;
        bool            rdma_supported;
+       u16             mtu;
 };
 
 enum qed_sb_type {
@@ -554,6 +555,33 @@ struct qed_common_ops {
  */
        int (*set_led)(struct qed_dev *cdev,
                       enum qed_led_mode mode);
+
+/**
+ * @brief update_drv_state - API to inform the change in the driver state.
+ *
+ * @param cdev
+ * @param active
+ *
+ */
+       int (*update_drv_state)(struct qed_dev *cdev, bool active);
+
+/**
+ * @brief update_mac - API to inform the change in the mac address
+ *
+ * @param cdev
+ * @param mac
+ *
+ */
+       int (*update_mac)(struct qed_dev *cdev, u8 *mac);
+
+/**
+ * @brief update_mtu - API to inform the change in the mtu
+ *
+ * @param cdev
+ * @param mtu
+ *
+ */
+       int (*update_mtu)(struct qed_dev *cdev, u16 mtu);
 };
 
 #define MASK_FIELD(_name, _value) \