Remove remains from previous functionality.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
/* Process the Mapping request */
/* TODO: Add race prevention */
- amd_decode_nb_mce(pvt->mc_node_id, &pvt->ctl_error_info, 1);
+ amd_decode_nb_mce(pvt->mc_node_id, &pvt->ctl_error_info);
return count;
}
pr_emerg(HW_ERR "Corrupted LS MCE info?\n");
}
-void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
+void amd_decode_nb_mce(int node_id, struct err_regs *regs)
{
u32 ec = ERROR_CODE(regs->nbsl);
- if (!handle_errors)
- return;
-
/*
* GART TLB error reporting is disabled by default. Bail out early.
*/
regs.nbeah = (u32)(m->addr >> 32);
node = amd_get_nb_id(m->extcpu);
- amd_decode_nb_mce(node, ®s, 1);
+ amd_decode_nb_mce(node, ®s);
break;
case 5:
void amd_report_gart_errors(bool);
void amd_register_ecc_decoder(void (*f)(int, struct err_regs *));
void amd_unregister_ecc_decoder(void (*f)(int, struct err_regs *));
-void amd_decode_nb_mce(int, struct err_regs *, int);
+void amd_decode_nb_mce(int, struct err_regs *);
#endif /* _EDAC_MCE_AMD_H */