DSP Bridge needs to disable the peripheral clocks when switches to
BRD_STOPPED since that would prevent the domain to enter in OFF state.
Signed-off-by: Ernesto Ramos <ernesto@ti.com>
Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
struct bridge_dev_context *dev_context = dev_ctxt;
struct pg_table_attrs *pt_attrs;
u32 dsp_pwr_state;
- int clk_status;
struct dspbridge_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
(*pdata->dsp_prm_write)(OMAP3430_RST1_IVA2_MASK | OMAP3430_RST2_IVA2_MASK |
OMAP3430_RST3_IVA2_MASK, OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL);
- clk_status = dsp_clk_disable(DSP_CLK_IVA2);
+ dsp_clock_disable_all(dev_context->dsp_per_clks);
+ dsp_clk_disable(DSP_CLK_IVA2);
return status;
}