* MII operations
*/
/* Wait until the previous MDC/MDIO transaction has completed */
-static void mdio_poll(void)
+static void bfin_mdio_poll(void)
{
int timeout_cnt = MAX_TIMEOUT_CNT;
}
/* Read an off-chip register in a PHY through the MDC/MDIO port */
-static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
+static int bfin_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
{
- mdio_poll();
+ bfin_mdio_poll();
/* read mode */
bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
SET_REGAD((u16) regnum) |
STABUSY);
- mdio_poll();
+ bfin_mdio_poll();
return (int) bfin_read_EMAC_STADAT();
}
/* Write an off-chip register in a PHY through the MDC/MDIO port */
-static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
- u16 value)
+static int bfin_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
+ u16 value)
{
- mdio_poll();
+ bfin_mdio_poll();
bfin_write_EMAC_STADAT((u32) value);
STAOP |
STABUSY);
- mdio_poll();
+ bfin_mdio_poll();
return 0;
}
-static int mdiobus_reset(struct mii_bus *bus)
+static int bfin_mdiobus_reset(struct mii_bus *bus)
{
return 0;
}
bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
/* Wait MII done */
- mdio_poll();
+ bfin_mdio_poll();
/* We enable only RX here */
/* ASTP : Enable Automatic Pad Stripping
goto out_err_mdiobus_alloc;
lp->mii_bus->priv = ndev;
- lp->mii_bus->read = mdiobus_read;
- lp->mii_bus->write = mdiobus_write;
- lp->mii_bus->reset = mdiobus_reset;
+ lp->mii_bus->read = bfin_mdiobus_read;
+ lp->mii_bus->write = bfin_mdiobus_write;
+ lp->mii_bus->reset = bfin_mdiobus_reset;
lp->mii_bus->name = "bfin_mac_mdio";
snprintf(lp->mii_bus->id, MII_BUS_ID_SIZE, "0");
lp->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);