+1 Release Date : Sun May 14 22:49:52 PDT 2006 - Sumant Patro <Sumant.Patro@lsil.com>
+2 Current Version : 00.00.03.01
+3 Older Version : 00.00.02.04
+
+i. Added support for ZCR controller.
+
+ New device id 0x413 added.
+
+ii. Bug fix : Disable controller interrupt before firing INIT cmd to FW.
+
+ Interrupt is enabled after required initialization is over.
+ This is done to ensure that driver is ready to handle interrupts when
+ it is generated by the controller.
+
+ -Sumant Patro <Sumant.Patro@lsil.com>
+
1 Release Date : Wed Feb 03 14:31:44 PST 2006 - Sumant Patro <Sumant.Patro@lsil.com>
2 Current Version : 00.00.02.04
3 Older Version : 00.00.02.04
* 2 of the License, or (at your option) any later version.
*
* FILE : megaraid_sas.c
- * Version : v00.00.02.04
+ * Version : v00.00.03.01
*
* Authors:
* Sreenivas Bagalkote <Sreenivas.Bagalkote@lsil.com>
{
PCI_VENDOR_ID_LSI_LOGIC,
- PCI_DEVICE_ID_LSI_SAS1064R, // xscale IOP
+ PCI_DEVICE_ID_LSI_SAS1064R, /* xscale IOP */
PCI_ANY_ID,
PCI_ANY_ID,
},
{
PCI_VENDOR_ID_LSI_LOGIC,
- PCI_DEVICE_ID_LSI_SAS1078R, // ppc IOP
+ PCI_DEVICE_ID_LSI_SAS1078R, /* ppc IOP */
PCI_ANY_ID,
PCI_ANY_ID,
},
+ {
+ PCI_VENDOR_ID_LSI_LOGIC,
+ PCI_DEVICE_ID_LSI_VERDE_ZCR, /* xscale IOP, vega */
+ PCI_ANY_ID,
+ PCI_ANY_ID,
+ },
{
PCI_VENDOR_ID_DELL,
- PCI_DEVICE_ID_DELL_PERC5, // xscale IOP
+ PCI_DEVICE_ID_DELL_PERC5, /* xscale IOP */
PCI_ANY_ID,
PCI_ANY_ID,
},
* @regs: MFI register set
*/
static inline void
-megasas_disable_intr(struct megasas_register_set __iomem * regs)
+megasas_disable_intr(struct megasas_instance *instance)
{
u32 mask = 0x1f;
+ struct megasas_register_set __iomem *regs = instance->reg_set;
+
+ if(instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1078R)
+ mask = 0xffffffff;
+
writel(mask, ®s->outbound_intr_mask);
/* Dummy readl to force pci flush */
/*
* Bring it to READY state; assuming max wait 2 secs
*/
- megasas_disable_intr(instance->reg_set);
+ megasas_disable_intr(instance);
writel(MFI_INIT_READY, &instance->reg_set->inbound_doorbell);
max_wait = 10;
init_frame->data_xfer_len = sizeof(struct megasas_init_queue_info);
+ /*
+ * disable the intr before firing the init frame to FW
+ */
+ megasas_disable_intr(instance);
+
/*
* Issue the init frame in polled mode
*/
megasas_mgmt_info.max_index--;
pci_set_drvdata(pdev, NULL);
- megasas_disable_intr(instance->reg_set);
+ megasas_disable_intr(instance);
free_irq(instance->pdev->irq, instance);
megasas_release_mfi(instance);
pci_set_drvdata(instance->pdev, NULL);
- megasas_disable_intr(instance->reg_set);
+ megasas_disable_intr(instance);
free_irq(instance->pdev->irq, instance);
/**
* MegaRAID SAS Driver meta data
*/
-#define MEGASAS_VERSION "00.00.02.04"
-#define MEGASAS_RELDATE "Feb 03, 2006"
-#define MEGASAS_EXT_VERSION "Fri Feb 03 14:31:44 PST 2006"
+#define MEGASAS_VERSION "00.00.03.01"
+#define MEGASAS_RELDATE "May 14, 2006"
+#define MEGASAS_EXT_VERSION "Sun May 14 22:49:52 PDT 2006"
+
+/*
+ * Device IDs
+ */
+#define PCI_DEVICE_ID_LSI_SAS1078R 0x0060
+#define PCI_DEVICE_ID_LSI_VERDE_ZCR 0x0413
+
/*
* =====================================
* MegaRAID SAS MFI firmware definitions
#define MFI_POLL_TIMEOUT_SECS 10
#define MFI_REPLY_1078_MESSAGE_INTERRUPT 0x80000000
-#define PCI_DEVICE_ID_LSI_SAS1078R 0x00000060
+
+/*
+* register set for both 1068 and 1078 controllers
+* structure extended for 1078 registers
+*/
struct megasas_register_set {
u32 reserved_0[4]; /*0000h*/
struct compat_iovec sgl[MAX_IOCTL_SGE];
} __attribute__ ((packed));
+#define MEGASAS_IOC_FIRMWARE32 _IOWR('M', 1, struct compat_megasas_iocpacket)
#endif
#define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct megasas_iocpacket)
-#define MEGASAS_IOC_FIRMWARE32 _IOWR('M', 1, struct compat_megasas_iocpacket)
#define MEGASAS_IOC_GET_AEN _IOW('M', 3, struct megasas_aen)
struct megasas_mgmt_info {