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[ARM] 4421/1: AT91: Value of _KEY fields.
authorAndrew Victor <andrew@sanpeople.com>
Thu, 31 May 2007 09:16:00 +0000 (10:16 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 3 Jun 2007 16:52:35 +0000 (17:52 +0100)
Use the actual value (0xA5) for the AT91_SHDW_KEY and AT91_WDT_KEY
register fields instead of a bitmask.

This is consistent with how AT91_RSTC_KEY is defined, and is easier to
use in code.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
include/asm-arm/arch-at91/at91_shdwc.h patch | blob | blame | history
include/asm-arm/arch-at91/at91_wdt.h patch | blob | blame | history

diff --git a/include/asm-arm/arch-at91/at91_shdwc.h b/include/asm-arm/arch-at91/at91_shdwc.h
index 795fcc266228b93f914a42b9a037fb4bb7046003..01b433de22726baabddcfa1ff461a9718cacf60a 100644 (file)
--- a/include/asm-arm/arch-at91/at91_shdwc.h
+++ b/include/asm-arm/arch-at91/at91_shdwc.h
@@ -14,8 +14,8 @@
 #define AT91_SHDWC_H
 
 #define AT91_SHDW_CR           (AT91_SHDWC + 0x00)     /* Shut Down Control Register */
-#define                AT91_SHDW_SHDW          (1    << 0)             /* Processor Reset */
-#define                AT91_SHDW_KEY           (0xff << 24)            /* KEY Password */
+#define                AT91_SHDW_SHDW          (1    << 0)             /* Shut Down command */
+#define                AT91_SHDW_KEY           (0xa5 << 24)            /* KEY Password */
 
 #define AT91_SHDW_MR           (AT91_SHDWC + 0x04)     /* Shut Down Mode Register */
 #define                AT91_SHDW_WKMODE0       (3 << 0)                /* Wake-up 0 Mode Selection */
diff --git a/include/asm-arm/arch-at91/at91_wdt.h b/include/asm-arm/arch-at91/at91_wdt.h
index 7251a344c740455a7e627a01e996e89c81b8e5e1..1014e9bf181ff14645d76d2450981a21a349fdba 100644 (file)
--- a/include/asm-arm/arch-at91/at91_wdt.h
+++ b/include/asm-arm/arch-at91/at91_wdt.h
@@ -15,7 +15,7 @@
 
 #define AT91_WDT_CR            (AT91_WDT + 0x00)       /* Watchdog Control Register */
 #define                AT91_WDT_WDRSTT         (1    << 0)             /* Restart */
-#define                AT91_WDT_KEY            (0xff << 24)            /* KEY Password */
+#define                AT91_WDT_KEY            (0xa5 << 24)            /* KEY Password */
 
 #define AT91_WDT_MR            (AT91_WDT + 0x04)       /* Watchdog Mode Register */
 #define                AT91_WDT_WDV            (0xfff << 0)            /* Counter Value */