drm/msm/mdp5: Don't get source of MDP core clock

The driver expects DT to provide the parent to MDP core clock. The only
operation done to the parent clock is to set a rate. This can be
achieved by setting the rate on the core clock itsef. Don't try to
get the parent clock anymore.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
index f0c285b1c0278ad9f56ae4d7255e2c0df7a3e861..16316bc4933d662378bc85560c42705e3d9f1d1b 100644 (file)
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
@@ -627,9 +627,6 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
        if (ret)
                goto fail;
        ret = get_clk(pdev, &mdp5_kms->ahb_clk, "iface_clk", true);
-       if (ret)
-               goto fail;
-       ret = get_clk(pdev, &mdp5_kms->src_clk, "core_clk_src", true);
        if (ret)
                goto fail;
        ret = get_clk(pdev, &mdp5_kms->core_clk, "core_clk", true);
@@ -646,7 +643,7 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
         * rate first, then figure out hw revision, and then set a
         * more optimal rate:
         */
-       clk_set_rate(mdp5_kms->src_clk, 200000000);
+       clk_set_rate(mdp5_kms->core_clk, 200000000);
 
        read_hw_revision(mdp5_kms, &major, &minor);
 
@@ -661,7 +658,7 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
        mdp5_kms->caps = config->hw->mdp.caps;
 
        /* TODO: compute core clock rate at runtime */
-       clk_set_rate(mdp5_kms->src_clk, config->hw->max_clk);
+       clk_set_rate(mdp5_kms->core_clk, config->hw->max_clk);
 
        /*
         * Some chipsets have a Shared Memory Pool (SMP), while others

diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h
index 9a25898239d3d06d62519f1d990f10be081da559..9cf5aa4e5ec317dc4ef9c9c62a8f5fae52f4bd38 100644 (file)
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h
@@ -49,7 +49,6 @@ struct mdp5_kms {
 
        struct clk *axi_clk;
        struct clk *ahb_clk;
-       struct clk *src_clk;
        struct clk *core_clk;
        struct clk *lut_clk;
        struct clk *vsync_clk;