[ARM] 4201/1: SMP barriers pair needed for the secondary boot process
authorCatalin Marinas <catalin.marinas@arm.com>
Thu, 15 Feb 2007 18:05:29 +0000 (19:05 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 16 Feb 2007 13:06:56 +0000 (13:06 +0000)
In some situations, the pen_release store in platform_secondary_init()
may stay forever in the write buffer while the CPU is waiting on the
boot_lock to be released in boot_secondary(). The primary CPU could
never see the pen_release update without the barriers.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-realview/platsmp.c

index 709a9b1ac634913c14848413499f70596791e52d..fce3596f9950a6aea5d8489d9d674a99759ad7b0 100644 (file)
@@ -59,6 +59,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
         * pen, then head off into the C entry point
         */
        pen_release = -1;
+       smp_wmb();
 
        /*
         * Synchronise with the boot thread.
@@ -102,6 +103,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 
        timeout = jiffies + (1 * HZ);
        while (time_before(jiffies, timeout)) {
+               smp_rmb();
                if (pen_release == -1)
                        break;