static inline void ni_set_bitfield(struct comedi_device *dev, int reg,
unsigned bit_mask, unsigned bit_values)
{
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags);
static inline void ni_set_cdo_dma_channel(struct comedi_device *dev,
int mite_channel)
{
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags);
static int ni_request_ai_mite_channel(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
static int ni_request_ao_mite_channel(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
unsigned gpct_index,
enum comedi_io_direction direction)
{
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
struct mite_channel *mite_chan;
static int ni_request_cdo_mite_channel(struct comedi_device *dev)
{
#ifdef PCIDMA
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
static void ni_release_ai_mite_channel(struct comedi_device *dev)
{
#ifdef PCIDMA
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
static void ni_release_ao_mite_channel(struct comedi_device *dev)
{
#ifdef PCIDMA
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
static void ni_release_gpct_mite_channel(struct comedi_device *dev,
unsigned gpct_index)
{
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
BUG_ON(gpct_index >= NUM_GPCT);
static void ni_release_cdo_mite_channel(struct comedi_device *dev)
{
#ifdef PCIDMA
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
static void ni_e_series_enable_second_irq(struct comedi_device *dev,
unsigned gpct_index, short enable)
{
+ struct ni_private *devpriv = dev->private;
+
if (boardtype.reg_type & ni_reg_m_series_mask)
return;
switch (gpct_index) {
static void ni_clear_ai_fifo(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
+
if (boardtype.reg_type == ni_reg_6143) {
/* Flush the 6143 data FIFO */
ni_writel(0x10, AIFIFO_Control_6143); /* Flush fifo */
static void win_out2(struct comedi_device *dev, uint32_t data, int reg)
{
+ struct ni_private *devpriv = dev->private;
+
devpriv->stc_writew(dev, data >> 16, reg);
devpriv->stc_writew(dev, data & 0xffff, reg + 1);
}
static uint32_t win_in2(struct comedi_device *dev, int reg)
{
+ struct ni_private *devpriv = dev->private;
uint32_t bits;
+
bits = devpriv->stc_readw(dev, reg) << 16;
bits |= devpriv->stc_readw(dev, reg + 1);
return bits;
static inline void ni_ao_win_outw(struct comedi_device *dev, uint16_t data,
int addr)
{
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
spin_lock_irqsave(&devpriv->window_lock, flags);
static inline void ni_ao_win_outl(struct comedi_device *dev, uint32_t data,
int addr)
{
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
spin_lock_irqsave(&devpriv->window_lock, flags);
static inline unsigned short ni_ao_win_inw(struct comedi_device *dev, int addr)
{
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
unsigned short data;
static irqreturn_t ni_E_interrupt(int irq, void *d)
{
struct comedi_device *dev = d;
+ struct ni_private *devpriv = dev->private;
unsigned short a_status;
unsigned short b_status;
unsigned int ai_mite_status = 0;
#ifdef PCIDMA
static void ni_sync_ai_dma(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
unsigned long flags;
static void mite_handle_b_linkc(struct mite_struct *mite,
struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV];
unsigned long flags;
static int ni_ao_wait_for_dma_load(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
static const int timeout = 10000;
int i;
for (i = 0; i < timeout; i++) {
#endif /* PCIDMA */
static void ni_handle_eos(struct comedi_device *dev, struct comedi_subdevice *s)
{
+ struct ni_private *devpriv = dev->private;
+
if (devpriv->aimode == AIMODE_SCAN) {
#ifdef PCIDMA
static const int timeout = 10;
unsigned short counter_index)
{
#ifdef PCIDMA
+ struct ni_private *devpriv = dev->private;
struct comedi_subdevice *s;
s = &dev->subdevices[NI_GPCT_SUBDEV(counter_index)];
static void ack_a_interrupt(struct comedi_device *dev, unsigned short a_status)
{
+ struct ni_private *devpriv = dev->private;
unsigned short ack = 0;
if (a_status & AI_SC_TC_St) {
static void handle_a_interrupt(struct comedi_device *dev, unsigned short status,
unsigned ai_mite_status)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
/* 67xx boards don't have ai subdevice, but their gpct0 might generate an a interrupt */
static void ack_b_interrupt(struct comedi_device *dev, unsigned short b_status)
{
+ struct ni_private *devpriv = dev->private;
unsigned short ack = 0;
+
if (b_status & AO_BC_TC_St) {
ack |= AO_BC_TC_Interrupt_Ack;
}
static void handle_b_interrupt(struct comedi_device *dev,
unsigned short b_status, unsigned ao_mite_status)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV];
/* unsigned short ack=0; */
+
#ifdef DEBUG_INTERRUPT
printk("ni_mio_common: interrupt: b_status=%04x m1_status=%08x\n",
b_status, ao_mite_status);
static int ni_ao_prep_fifo(struct comedi_device *dev,
struct comedi_subdevice *s)
{
+ struct ni_private *devpriv = dev->private;
int n;
/* reset fifo */
static void ni_ai_fifo_read(struct comedi_device *dev,
struct comedi_subdevice *s, int n)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_async *async = s->async;
int i;
#ifdef PCIDMA
static int ni_ai_drain_dma(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
int i;
static const int timeout = 10000;
unsigned long flags;
*/
static void ni_handle_fifo_dregs(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
short data[2];
u32 dl;
static void get_last_sample_611x(struct comedi_device *dev)
{
+ struct ni_private *devpriv __maybe_unused = dev->private;
struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
short data;
u32 dl;
static void get_last_sample_6143(struct comedi_device *dev)
{
+ struct ni_private *devpriv __maybe_unused = dev->private;
struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
short data;
u32 dl;
void *data, unsigned int num_bytes,
unsigned int chan_index)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_async *async = s->async;
unsigned int i;
unsigned int length = num_bytes / bytes_per_sample(s);
short *array = data;
unsigned int *larray = data;
+
for (i = 0; i < length; i++) {
#ifdef PCIDMA
if (s->subdev_flags & SDF_LSAMPL)
static int ni_ai_setup_MITE_dma(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
int retval;
unsigned long flags;
static int ni_ao_setup_MITE_dma(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV];
int retval;
unsigned long flags;
static int ni_ai_reset(struct comedi_device *dev, struct comedi_subdevice *s)
{
+ struct ni_private *devpriv = dev->private;
+
ni_release_ai_mite_channel(dev);
/* ai configuration */
devpriv->stc_writew(dev, AI_Configuration_Start | AI_Reset,
struct comedi_subdevice *s, struct comedi_insn *insn,
unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
int i, n;
const unsigned int mask = (1 << boardtype.adbits) - 1;
unsigned signbits;
static void ni_prime_channelgain_list(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
int i;
+
devpriv->stc_writew(dev, AI_CONVERT_Pulse, AI_Command_1_Register);
for (i = 0; i < NI_TIMEOUT; ++i) {
if (!(devpriv->stc_readw(dev,
unsigned int n_chan,
unsigned int *list)
{
+ struct ni_private *devpriv = dev->private;
unsigned int chan, range, aref;
unsigned int i;
unsigned offset;
static void ni_load_channelgain_list(struct comedi_device *dev,
unsigned int n_chan, unsigned int *list)
{
+ struct ni_private *devpriv = dev->private;
unsigned int chan, range, aref;
unsigned int i;
unsigned int hi, lo;
static int ni_ns_to_timer(const struct comedi_device *dev, unsigned nanosec,
int round_mode)
{
+ struct ni_private *devpriv = dev->private;
int divider;
+
switch (round_mode) {
case TRIG_ROUND_NEAREST:
default:
static unsigned ni_timer_to_ns(const struct comedi_device *dev, int timer)
{
+ struct ni_private *devpriv = dev->private;
+
return devpriv->clock_ns * (timer + 1);
}
static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
+ struct ni_private *devpriv = dev->private;
int err = 0;
int tmp;
unsigned int sources;
static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
+ struct ni_private *devpriv = dev->private;
const struct comedi_cmd *cmd = &s->async->cmd;
int timer;
int mode1 = 0; /* mode1 is needed for both stop and convert */
static int ni_ai_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
unsigned int trignum)
{
+ struct ni_private *devpriv = dev->private;
+
if (trignum != 0)
return -EINVAL;
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+
if (insn->n < 1)
return -EINVAL;
struct comedi_insn *insn,
unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
unsigned int a, b, modebits;
int err = 0;
unsigned int chanspec[],
unsigned int n_chans, int timed)
{
+ struct ni_private *devpriv = dev->private;
unsigned int range;
unsigned int chan;
unsigned int conf;
unsigned int chanspec[],
unsigned int n_chans)
{
+ struct ni_private *devpriv = dev->private;
unsigned int range;
unsigned int chan;
unsigned int conf;
struct comedi_subdevice *s, struct comedi_insn *insn,
unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+
data[0] = devpriv->ao[CR_CHAN(insn->chanspec)];
return 1;
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
unsigned int chan = CR_CHAN(insn->chanspec);
unsigned int invert;
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
unsigned int chan = CR_CHAN(insn->chanspec);
unsigned int invert;
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+
switch (data[0]) {
case INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE:
switch (data[1]) {
static int ni_ao_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
unsigned int trignum)
{
+ struct ni_private *devpriv = dev->private;
int ret;
int interrupt_b_bits;
int i;
static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
+ struct ni_private *devpriv = dev->private;
const struct comedi_cmd *cmd = &s->async->cmd;
int bits;
int i;
static int ni_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
+ struct ni_private *devpriv = dev->private;
int err = 0;
int tmp;
static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s)
{
+ struct ni_private *devpriv = dev->private;
+
/* devpriv->ao0p=0x0000; */
/* ni_writew(devpriv->ao0p,AO_Configuration); */
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+
#ifdef DEBUG_DIO
printk("ni_dio_insn_config() chan=%d io=%d\n",
CR_CHAN(insn->chanspec), data[0]);
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+
#ifdef DEBUG_DIO
printk("ni_dio_insn_bits() mask=0x%x bits=0x%x\n", data[0], data[1]);
#endif
struct comedi_insn *insn,
unsigned int *data)
{
+ struct ni_private *devpriv __maybe_unused = dev->private;
+
#ifdef DEBUG_DIO
printk("ni_m_series_dio_insn_config() chan=%d io=%d\n",
CR_CHAN(insn->chanspec), data[0]);
struct comedi_insn *insn,
unsigned int *data)
{
+ struct ni_private *devpriv __maybe_unused = dev->private;
+
#ifdef DEBUG_DIO
printk("ni_m_series_dio_insn_bits() mask=0x%x bits=0x%x\n", data[0],
data[1]);
static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
+ struct ni_private *devpriv __maybe_unused = dev->private;
const struct comedi_cmd *cmd = &s->async->cmd;
unsigned cdo_mode_bits = CDO_FIFO_Mode_Bit | CDO_Halt_On_Error_Bit;
int retval;
unsigned int trignum)
{
#ifdef PCIDMA
+ struct ni_private *devpriv = dev->private;
unsigned long flags;
#endif
int retval = 0;
static int ni_cdio_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
{
+ struct ni_private *devpriv __maybe_unused = dev->private;
+
ni_writel(CDO_Disarm_Bit | CDO_Error_Interrupt_Enable_Clear_Bit |
CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit |
CDO_FIFO_Request_Interrupt_Enable_Clear_Bit,
static void handle_cdio_interrupt(struct comedi_device *dev)
{
+ struct ni_private *devpriv __maybe_unused = dev->private;
unsigned cdio_status;
struct comedi_subdevice *s = &dev->subdevices[NI_DIO_SUBDEV];
#ifdef PCIDMA
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
int err = insn->n;
unsigned char byte_out, byte_in = 0;
unsigned char data_out,
unsigned char *data_in)
{
+ struct ni_private *devpriv = dev->private;
unsigned int status1;
int err = 0, count = 20;
unsigned char data_out,
unsigned char *data_in)
{
+ struct ni_private *devpriv = dev->private;
unsigned char mask, input = 0;
#ifdef DEBUG_DIO
static void mio_common_detach(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_subdevice *s;
- if (dev->private) {
+ if (devpriv) {
if (devpriv->counter_dev) {
ni_gpct_device_destroy(devpriv->counter_dev);
}
enum ni_gpct_register reg)
{
struct comedi_device *dev = counter->counter_dev->dev;
+ struct ni_private *devpriv = dev->private;
unsigned stc_register;
/* bits in the join reset register which are relevant to counters */
static const unsigned gpct_joint_reset_mask = G0_Reset | G1_Reset;
enum ni_gpct_register reg)
{
struct comedi_device *dev = counter->counter_dev->dev;
+ struct ni_private *devpriv = dev->private;
unsigned stc_register;
+
switch (reg) {
/* m-series only registers */
case NITIO_G0_DMA_Status_Reg:
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+
data[0] = devpriv->clock_and_fout & FOUT_Divider_mask;
return 1;
}
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+
devpriv->clock_and_fout &= ~FOUT_Enable;
devpriv->stc_writew(dev, devpriv->clock_and_fout,
Clock_and_FOUT_Register);
static int ni_set_freq_out_clock(struct comedi_device *dev,
unsigned int clock_source)
{
+ struct ni_private *devpriv = dev->private;
+
switch (clock_source) {
case NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC:
devpriv->clock_and_fout &= ~FOUT_Timebase_Select;
unsigned int *clock_source,
unsigned int *clock_period_ns)
{
+ struct ni_private *devpriv = dev->private;
+
if (devpriv->clock_and_fout & FOUT_Timebase_Select) {
*clock_source = NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC;
*clock_period_ns = TIMEBASE_2_NS;
static int ni_alloc_private(struct comedi_device *dev)
{
+ struct ni_private *devpriv;
int ret;
- ret = alloc_private(dev, sizeof(struct ni_private));
- if (ret < 0)
+ ret = alloc_private(dev, sizeof(*devpriv));
+ if (ret)
return ret;
+ devpriv = dev->private;
spin_lock_init(&devpriv->window_lock);
spin_lock_init(&devpriv->soft_reg_copy_lock);
static int ni_E_init(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
struct comedi_subdevice *s;
unsigned j;
enum ni_gpct_variant counter_variant;
static int ni_8255_callback(int dir, int port, int data, unsigned long arg)
{
struct comedi_device *dev = (struct comedi_device *)arg;
+ struct ni_private *devpriv __maybe_unused = dev->private;
if (dir) {
ni_writeb(data, Port_A + 2 * port);
static int ni_read_eeprom(struct comedi_device *dev, int addr)
{
+ struct ni_private *devpriv __maybe_unused = dev->private;
int bit;
int bitstring;
struct comedi_insn *insn,
unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+
data[0] = devpriv->eeprom_buffer[CR_CHAN(insn->chanspec)];
return 1;
static int ni_get_pwm_config(struct comedi_device *dev, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+
data[1] = devpriv->pwm_up_count * devpriv->clock_ns;
data[2] = devpriv->pwm_down_count * devpriv->clock_ns;
return 3;
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
unsigned up_count, down_count;
+
switch (data[0]) {
case INSN_CONFIG_PWM_OUTPUT:
switch (data[1]) {
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
unsigned up_count, down_count;
+
switch (data[0]) {
case INSN_CONFIG_PWM_OUTPUT:
switch (data[1]) {
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+
data[0] = devpriv->caldacs[CR_CHAN(insn->chanspec)];
return 1;
static void caldac_setup(struct comedi_device *dev, struct comedi_subdevice *s)
{
+ struct ni_private *devpriv = dev->private;
int i, j;
int n_dacs;
int n_chans = 0;
static void ni_write_caldac(struct comedi_device *dev, int addr, int val)
{
+ struct ni_private *devpriv = dev->private;
unsigned int loadbit = 0, bits = 0, bit, bitstring = 0;
int i;
int type;
static int ni_m_series_set_pfi_routing(struct comedi_device *dev, unsigned chan,
unsigned source)
{
+ struct ni_private *devpriv = dev->private;
unsigned pfi_reg_index;
unsigned array_offset;
+
if ((source & 0x1f) != source)
return -EINVAL;
pfi_reg_index = 1 + chan / 3;
static unsigned ni_m_series_get_pfi_routing(struct comedi_device *dev,
unsigned chan)
{
+ struct ni_private *devpriv = dev->private;
const unsigned array_offset = chan / 3;
+
return MSeries_PFI_Output_Select_Source(chan,
devpriv->
pfi_output_select_reg
static int ni_config_filter(struct comedi_device *dev, unsigned pfi_channel,
enum ni_pfi_filter_select filter)
{
+ struct ni_private *devpriv __maybe_unused = dev->private;
unsigned bits;
+
if ((boardtype.reg_type & ni_reg_m_series_mask) == 0) {
return -ENOTSUPP;
}
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv __maybe_unused = dev->private;
+
if ((boardtype.reg_type & ni_reg_m_series_mask) == 0) {
return -ENOTSUPP;
}
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
unsigned int chan;
if (insn->n < 1)
*/
static void ni_rtsi_init(struct comedi_device *dev)
{
+ struct ni_private *devpriv = dev->private;
+
/* Initialises the RTSI bus signal switch to a default state */
/* Set clock mode to internal */
static int ni_mseries_set_pll_master_clock(struct comedi_device *dev,
unsigned source, unsigned period_ns)
{
+ struct ni_private *devpriv = dev->private;
static const unsigned min_period_ns = 50;
static const unsigned max_period_ns = 1000;
static const unsigned timeout = 1000;
unsigned freq_multiplier;
unsigned i;
int retval;
+
if (source == NI_MIO_PLL_PXI10_CLOCK)
period_ns = 100;
/* these limits are somewhat arbitrary, but NI advertises 1 to 20MHz range so we'll use that */
static int ni_set_master_clock(struct comedi_device *dev, unsigned source,
unsigned period_ns)
{
+ struct ni_private *devpriv = dev->private;
+
if (source == NI_MIO_INTERNAL_CLOCK) {
devpriv->rtsi_trig_direction_reg &= ~Use_RTSI_Clock_Bit;
devpriv->stc_writew(dev, devpriv->rtsi_trig_direction_reg,
static int ni_set_rtsi_routing(struct comedi_device *dev, unsigned chan,
unsigned source)
{
+ struct ni_private *devpriv = dev->private;
+
if (ni_valid_rtsi_output_source(dev, chan, source) == 0)
return -EINVAL;
if (chan < 4) {
static unsigned ni_get_rtsi_routing(struct comedi_device *dev, unsigned chan)
{
+ struct ni_private *devpriv = dev->private;
+
if (chan < 4) {
return RTSI_Trig_Output_Source(chan,
devpriv->rtsi_trig_a_output_reg);
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
unsigned int chan = CR_CHAN(insn->chanspec);
+
switch (data[0]) {
case INSN_CONFIG_DIO_OUTPUT:
if (chan < num_configurable_rtsi_channels(dev)) {