elf: Add powerpc specific core note sections

This patch adds twelve ELF core note sections for powerpc
architecture for various registers and register sets which
need to be accessed from ptrace interface and then gdb.
These additions include special purpose registers like TAR,
PPR, DSCR, TM running and checkpointed state for various
register sets, EBB related register set, performance monitor
register set etc. Addition of these new ELF core note
sections extends the existing ELF ABI on powerpc arch without
affecting it in any manner.

Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
index cb4a72f888d5865f5ce075d02ee0229184f2b4a2..1be3c5f6183b5754f157c1036d1e943c37c210e7 100644 (file)
--- a/include/uapi/linux/elf.h
+++ b/include/uapi/linux/elf.h
@@ -381,6 +381,19 @@ typedef struct elf64_shdr {
 #define NT_PPC_VMX     0x100           /* PowerPC Altivec/VMX registers */
 #define NT_PPC_SPE     0x101           /* PowerPC SPE/EVR registers */
 #define NT_PPC_VSX     0x102           /* PowerPC VSX registers */
+#define NT_PPC_TAR     0x103           /* Target Address Register */
+#define NT_PPC_PPR     0x104           /* Program Priority Register */
+#define NT_PPC_DSCR    0x105           /* Data Stream Control Register */
+#define NT_PPC_EBB     0x106           /* Event Based Branch Registers */
+#define NT_PPC_PMU     0x107           /* Performance Monitor Registers */
+#define NT_PPC_TM_CGPR 0x108           /* TM checkpointed GPR Registers */
+#define NT_PPC_TM_CFPR 0x109           /* TM checkpointed FPR Registers */
+#define NT_PPC_TM_CVMX 0x10a           /* TM checkpointed VMX Registers */
+#define NT_PPC_TM_CVSX 0x10b           /* TM checkpointed VSX Registers */
+#define NT_PPC_TM_SPR  0x10c           /* TM Special Purpose Registers */
+#define NT_PPC_TM_CTAR 0x10d           /* TM checkpointed Target Address Register */
+#define NT_PPC_TM_CPPR 0x10e           /* TM checkpointed Program Priority Register */
+#define NT_PPC_TM_CDSCR        0x10f           /* TM checkpointed Data Stream Control Register */
 #define NT_386_TLS     0x200           /* i386 TLS slots (struct user_desc) */
 #define NT_386_IOPERM  0x201           /* x86 io permission bitmap (1=deny) */
 #define NT_X86_XSTATE  0x202           /* x86 extended state using xsave */