}
return 1;
}
+__setup("iommu=", iommu_setup);
+
+void __init pci_iommu_alloc(void)
+{
+ /*
+ * The order of these functions is important for
+ * fall-back/fail-over reasons
+ */
+#ifdef CONFIG_IOMMU
+ iommu_hole_init();
+#endif
+
+#ifdef CONFIG_SWIOTLB
+ pci_swiotlb_init();
+#endif
+}
+
+static int __init pci_iommu_init(void)
+{
+#ifdef CONFIG_IOMMU
+ gart_iommu_init();
+#endif
+
+ no_iommu_init();
+ return 0;
+}
+
+/* Must execute after PCI subsystem */
+fs_initcall(pci_iommu_init);
.unmap_sg = gart_unmap_sg,
};
-static int __init pci_iommu_init(void)
+void __init gart_iommu_init(void)
{
struct agp_kern_info info;
unsigned long aper_size;
if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) {
printk(KERN_INFO "PCI-GART: No AMD northbridge found.\n");
- return -ENODEV;
+ return;
}
#ifndef CONFIG_AGP_AMD64
#endif
if (swiotlb)
- return -ENODEV;
+ return;
/* Did we detect a different HW IOMMU? */
if (iommu_detected && !iommu_aperture)
- return -1;
+ return;
if (no_iommu ||
(!force_iommu && end_pfn <= MAX_DMA32_PFN) ||
"but IOMMU not available.\n"
KERN_ERR "WARNING 32bit PCI may malfunction.\n");
}
- return -ENODEV;
+ return;
}
printk(KERN_INFO "PCI-DMA: using GART IOMMU.\n");
flush_gart();
dma_ops = &gart_dma_ops;
- return 0;
}
/* Must execute after PCI subsystem */
-fs_initcall(pci_iommu_init);
+fs_initcall(gart_iommu_init);
void gart_parse_options(char *p)
{
#include <asm/setup.h>
#include <asm/mach_apic.h>
#include <asm/numa.h>
-#include <asm/swiotlb.h>
#include <asm/sections.h>
#include <asm/dmi.h>
e820_setup_gap();
-#ifdef CONFIG_IOMMU
- iommu_hole_init();
-#endif
-
#ifdef CONFIG_VT
#if defined(CONFIG_VGA_CONSOLE)
conswitchp = &vga_con;
#include <asm/proto.h>
#include <asm/smp.h>
#include <asm/sections.h>
-#include <asm/dma-mapping.h>
-#include <asm/swiotlb.h>
#ifndef Dprintk
#define Dprintk(x...)
{
long codesize, reservedpages, datasize, initsize;
-#ifdef CONFIG_SWIOTLB
- pci_swiotlb_init();
-#endif
- no_iommu_init();
+ pci_iommu_alloc();
/* How many end-of-memory variables you have, grandma! */
max_low_pfn = end_pfn;
#include <asm/scatterlist.h>
#include <linux/string.h>
#include <asm/page.h>
-#include <linux/dma-mapping.h> /* for have_iommu */
+extern void pci_iommu_alloc(void);
extern int iommu_setup(char *opt);
/* The PCI address space does equal the physical memory
extern void config_acpi_tables(void);
extern void ia32_syscall(void);
-extern void iommu_hole_init(void);
extern int pmtimer_mark_offset(void);
extern void pmtimer_resume(void);
extern void select_idle_routine(const struct cpuinfo_x86 *c);
-extern void gart_parse_options(char *);
-extern void __init no_iommu_init(void);
-
extern unsigned long table_start, table_end;
extern int exception_trace;
-extern int force_iommu, no_iommu;
extern int using_apic_timer;
extern int disable_apic;
extern unsigned cpu_khz;
extern int acpi_ht;
extern int acpi_disabled;
+extern void no_iommu_init(void);
+extern int force_iommu, no_iommu;
extern int iommu_detected;
#ifdef CONFIG_IOMMU
+extern void gart_iommu_init(void);
+extern void gart_parse_options(char *);
+extern void iommu_hole_init(void);
extern int fallback_aper_order;
extern int fallback_aper_force;
extern int iommu_aperture;