ARM: amba: integrator/realview/versatile/vexpress: get rid of NO_IRQ initializers
authorRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 18 Dec 2011 11:40:46 +0000 (11:40 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 25 Jan 2012 11:04:01 +0000 (11:04 +0000)
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-integrator/core.c
arch/arm/mach-integrator/integrator_cp.c
arch/arm/mach-realview/realview_eb.c
arch/arm/mach-realview/realview_pb1176.c
arch/arm/mach-realview/realview_pb11mp.c
arch/arm/mach-realview/realview_pba8.c
arch/arm/mach-realview/realview_pbx.c
arch/arm/mach-versatile/core.c
arch/arm/mach-versatile/versatile_pb.c
arch/arm/mach-vexpress/include/mach/ct-ca9x4.h

index 019f0ab08f66fabc6d58a18961c62d66bbb79b68..29baef9d8f764d872fc5654f1b2aaa55e1c89d1b 100644 (file)
@@ -44,7 +44,7 @@ static struct amba_device rtc_device = {
                .end    = INTEGRATOR_RTC_BASE + SZ_4K - 1,
                .flags  = IORESOURCE_MEM,
        },
-       .irq            = { IRQ_RTCINT, NO_IRQ },
+       .irq            = { IRQ_RTCINT },
 };
 
 static struct amba_device uart0_device = {
@@ -57,7 +57,7 @@ static struct amba_device uart0_device = {
                .end    = INTEGRATOR_UART0_BASE + SZ_4K - 1,
                .flags  = IORESOURCE_MEM,
        },
-       .irq            = { IRQ_UARTINT0, NO_IRQ },
+       .irq            = { IRQ_UARTINT0 },
 };
 
 static struct amba_device uart1_device = {
@@ -70,7 +70,7 @@ static struct amba_device uart1_device = {
                .end    = INTEGRATOR_UART1_BASE + SZ_4K - 1,
                .flags  = IORESOURCE_MEM,
        },
-       .irq            = { IRQ_UARTINT1, NO_IRQ },
+       .irq            = { IRQ_UARTINT1 },
 };
 
 static struct amba_device kmi0_device = {
@@ -82,7 +82,7 @@ static struct amba_device kmi0_device = {
                .end    = KMI0_BASE + SZ_4K - 1,
                .flags  = IORESOURCE_MEM,
        },
-       .irq            = { IRQ_KMIINT0, NO_IRQ },
+       .irq            = { IRQ_KMIINT0 },
 };
 
 static struct amba_device kmi1_device = {
@@ -94,7 +94,7 @@ static struct amba_device kmi1_device = {
                .end    = KMI1_BASE + SZ_4K - 1,
                .flags  = IORESOURCE_MEM,
        },
-       .irq            = { IRQ_KMIINT1, NO_IRQ },
+       .irq            = { IRQ_KMIINT1 },
 };
 
 static struct amba_device *amba_devs[] __initdata = {
index a8b6aa6003f35493cd8afa8b92212ee3510d9e6c..ecc08ed4f3c47fce5ea137d674bbbb972e540aea 100644 (file)
@@ -370,7 +370,7 @@ static struct amba_device aaci_device = {
                .end    = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1,
                .flags  = IORESOURCE_MEM,
        },
-       .irq            = { IRQ_CP_AACIINT, NO_IRQ },
+       .irq            = { IRQ_CP_AACIINT },
        .periphid       = 0,
 };
 
@@ -437,7 +437,7 @@ static struct amba_device clcd_device = {
                .flags  = IORESOURCE_MEM,
        },
        .dma_mask       = ~0,
-       .irq            = { IRQ_CP_CLCDCINT, NO_IRQ },
+       .irq            = { IRQ_CP_CLCDCINT },
        .periphid       = 0,
 };
 
index e62962117763879cb469c172d7f464b6339608d3..5c810e5886a1ccd52fc238c5078edcbff1fc5756 100644 (file)
@@ -140,40 +140,40 @@ static struct pl022_ssp_controller ssp0_plat_data = {
 /*
  * These devices are connected via the core APB bridge
  */
-#define GPIO2_IRQ      { IRQ_EB_GPIO2, NO_IRQ }
-#define GPIO3_IRQ      { IRQ_EB_GPIO3, NO_IRQ }
+#define GPIO2_IRQ      { IRQ_EB_GPIO2 }
+#define GPIO3_IRQ      { IRQ_EB_GPIO3 }
 
-#define AACI_IRQ       { IRQ_EB_AACI, NO_IRQ }
+#define AACI_IRQ       { IRQ_EB_AACI }
 #define MMCI0_IRQ      { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
-#define KMI0_IRQ       { IRQ_EB_KMI0, NO_IRQ }
-#define KMI1_IRQ       { IRQ_EB_KMI1, NO_IRQ }
+#define KMI0_IRQ       { IRQ_EB_KMI0 }
+#define KMI1_IRQ       { IRQ_EB_KMI1 }
 
 /*
  * These devices are connected directly to the multi-layer AHB switch
  */
-#define EB_SMC_IRQ     { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ       { NO_IRQ, NO_IRQ }
-#define EB_CLCD_IRQ    { IRQ_EB_CLCD, NO_IRQ }
-#define DMAC_IRQ       { IRQ_EB_DMA, NO_IRQ }
+#define EB_SMC_IRQ     { }
+#define MPMC_IRQ       { }
+#define EB_CLCD_IRQ    { IRQ_EB_CLCD }
+#define DMAC_IRQ       { IRQ_EB_DMA }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define SCTL_IRQ       { NO_IRQ, NO_IRQ }
-#define EB_WATCHDOG_IRQ        { IRQ_EB_WDOG, NO_IRQ }
-#define EB_GPIO0_IRQ   { IRQ_EB_GPIO0, NO_IRQ }
-#define GPIO1_IRQ      { IRQ_EB_GPIO1, NO_IRQ }
-#define EB_RTC_IRQ     { IRQ_EB_RTC, NO_IRQ }
+#define SCTL_IRQ       { }
+#define EB_WATCHDOG_IRQ        { IRQ_EB_WDOG }
+#define EB_GPIO0_IRQ   { IRQ_EB_GPIO0 }
+#define GPIO1_IRQ      { IRQ_EB_GPIO1 }
+#define EB_RTC_IRQ     { IRQ_EB_RTC }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
-#define SCI_IRQ                { IRQ_EB_SCI, NO_IRQ }
-#define EB_UART0_IRQ   { IRQ_EB_UART0, NO_IRQ }
-#define EB_UART1_IRQ   { IRQ_EB_UART1, NO_IRQ }
-#define EB_UART2_IRQ   { IRQ_EB_UART2, NO_IRQ }
-#define EB_UART3_IRQ   { IRQ_EB_UART3, NO_IRQ }
-#define EB_SSP_IRQ     { IRQ_EB_SSP, NO_IRQ }
+#define SCI_IRQ                { IRQ_EB_SCI }
+#define EB_UART0_IRQ   { IRQ_EB_UART0 }
+#define EB_UART1_IRQ   { IRQ_EB_UART1 }
+#define EB_UART2_IRQ   { IRQ_EB_UART2 }
+#define EB_UART3_IRQ   { IRQ_EB_UART3 }
+#define EB_SSP_IRQ     { IRQ_EB_SSP }
 
 /* FPGA Primecells */
 AMBA_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
index 913d105caab636a11ed81586d80eef4e0c9f68c7..485cc07204b4ff116e9ea156e922b2760752ee89 100644 (file)
@@ -132,27 +132,27 @@ static struct pl022_ssp_controller ssp0_plat_data = {
 /*
  * RealView PB1176 AMBA devices
  */
-#define GPIO2_IRQ      { IRQ_PB1176_GPIO2, NO_IRQ }
-#define GPIO3_IRQ      { IRQ_PB1176_GPIO3, NO_IRQ }
-#define AACI_IRQ       { IRQ_PB1176_AACI, NO_IRQ }
+#define GPIO2_IRQ      { IRQ_PB1176_GPIO2 }
+#define GPIO3_IRQ      { IRQ_PB1176_GPIO3 }
+#define AACI_IRQ       { IRQ_PB1176_AACI }
 #define MMCI0_IRQ      { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
-#define KMI0_IRQ       { IRQ_PB1176_KMI0, NO_IRQ }
-#define KMI1_IRQ       { IRQ_PB1176_KMI1, NO_IRQ }
-#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ       { NO_IRQ, NO_IRQ }
-#define PB1176_CLCD_IRQ        { IRQ_DC1176_CLCD, NO_IRQ }
-#define SCTL_IRQ       { NO_IRQ, NO_IRQ }
-#define PB1176_WATCHDOG_IRQ    { IRQ_DC1176_WATCHDOG, NO_IRQ }
-#define PB1176_GPIO0_IRQ       { IRQ_DC1176_GPIO0, NO_IRQ }
-#define GPIO1_IRQ      { IRQ_PB1176_GPIO1, NO_IRQ }
-#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
-#define SCI_IRQ                { IRQ_PB1176_SCI, NO_IRQ }
-#define PB1176_UART0_IRQ       { IRQ_DC1176_UART0, NO_IRQ }
-#define PB1176_UART1_IRQ       { IRQ_DC1176_UART1, NO_IRQ }
-#define PB1176_UART2_IRQ       { IRQ_DC1176_UART2, NO_IRQ }
-#define PB1176_UART3_IRQ       { IRQ_DC1176_UART3, NO_IRQ }
-#define PB1176_UART4_IRQ       { IRQ_PB1176_UART4, NO_IRQ }
-#define PB1176_SSP_IRQ         { IRQ_DC1176_SSP, NO_IRQ }
+#define KMI0_IRQ       { IRQ_PB1176_KMI0 }
+#define KMI1_IRQ       { IRQ_PB1176_KMI1 }
+#define PB1176_SMC_IRQ { }
+#define MPMC_IRQ       { }
+#define PB1176_CLCD_IRQ        { IRQ_DC1176_CLCD }
+#define SCTL_IRQ       { }
+#define PB1176_WATCHDOG_IRQ    { IRQ_DC1176_WATCHDOG }
+#define PB1176_GPIO0_IRQ       { IRQ_DC1176_GPIO0 }
+#define GPIO1_IRQ      { IRQ_PB1176_GPIO1 }
+#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
+#define SCI_IRQ                { IRQ_PB1176_SCI }
+#define PB1176_UART0_IRQ       { IRQ_DC1176_UART0 }
+#define PB1176_UART1_IRQ       { IRQ_DC1176_UART1 }
+#define PB1176_UART2_IRQ       { IRQ_DC1176_UART2 }
+#define PB1176_UART3_IRQ       { IRQ_DC1176_UART3 }
+#define PB1176_UART4_IRQ       { IRQ_PB1176_UART4 }
+#define PB1176_SSP_IRQ         { IRQ_DC1176_SSP }
 
 /* FPGA Primecells */
 AMBA_DEVICE(aaci,      "fpga:aaci",    AACI,           NULL);
index 127a3fd42ab13db2e8430b55166a66df9b46cfae..cb4f2daf58ea0732b2ba94506fd45a4bbfa6a456 100644 (file)
@@ -132,27 +132,27 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PB11MPCore AMBA devices
  */
 
-#define GPIO2_IRQ              { IRQ_PB11MP_GPIO2, NO_IRQ }
-#define GPIO3_IRQ              { IRQ_PB11MP_GPIO3, NO_IRQ }
-#define AACI_IRQ               { IRQ_TC11MP_AACI, NO_IRQ }
+#define GPIO2_IRQ              { IRQ_PB11MP_GPIO2 }
+#define GPIO3_IRQ              { IRQ_PB11MP_GPIO3 }
+#define AACI_IRQ               { IRQ_TC11MP_AACI }
 #define MMCI0_IRQ              { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
-#define KMI0_IRQ               { IRQ_TC11MP_KMI0, NO_IRQ }
-#define KMI1_IRQ               { IRQ_TC11MP_KMI1, NO_IRQ }
-#define PB11MP_SMC_IRQ         { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ               { NO_IRQ, NO_IRQ }
-#define PB11MP_CLCD_IRQ                { IRQ_PB11MP_CLCD, NO_IRQ }
-#define DMAC_IRQ               { IRQ_PB11MP_DMAC, NO_IRQ }
-#define SCTL_IRQ               { NO_IRQ, NO_IRQ }
-#define PB11MP_WATCHDOG_IRQ    { IRQ_PB11MP_WATCHDOG, NO_IRQ }
-#define PB11MP_GPIO0_IRQ       { IRQ_PB11MP_GPIO0, NO_IRQ }
-#define GPIO1_IRQ              { IRQ_PB11MP_GPIO1, NO_IRQ }
-#define PB11MP_RTC_IRQ         { IRQ_TC11MP_RTC, NO_IRQ }
-#define SCI_IRQ                        { IRQ_PB11MP_SCI, NO_IRQ }
-#define PB11MP_UART0_IRQ       { IRQ_TC11MP_UART0, NO_IRQ }
-#define PB11MP_UART1_IRQ       { IRQ_TC11MP_UART1, NO_IRQ }
-#define PB11MP_UART2_IRQ       { IRQ_PB11MP_UART2, NO_IRQ }
-#define PB11MP_UART3_IRQ       { IRQ_PB11MP_UART3, NO_IRQ }
-#define PB11MP_SSP_IRQ         { IRQ_PB11MP_SSP, NO_IRQ }
+#define KMI0_IRQ               { IRQ_TC11MP_KMI0 }
+#define KMI1_IRQ               { IRQ_TC11MP_KMI1 }
+#define PB11MP_SMC_IRQ         { }
+#define MPMC_IRQ               { }
+#define PB11MP_CLCD_IRQ                { IRQ_PB11MP_CLCD }
+#define DMAC_IRQ               { IRQ_PB11MP_DMAC }
+#define SCTL_IRQ               { }
+#define PB11MP_WATCHDOG_IRQ    { IRQ_PB11MP_WATCHDOG }
+#define PB11MP_GPIO0_IRQ       { IRQ_PB11MP_GPIO0 }
+#define GPIO1_IRQ              { IRQ_PB11MP_GPIO1 }
+#define PB11MP_RTC_IRQ         { IRQ_TC11MP_RTC }
+#define SCI_IRQ                        { IRQ_PB11MP_SCI }
+#define PB11MP_UART0_IRQ       { IRQ_TC11MP_UART0 }
+#define PB11MP_UART1_IRQ       { IRQ_TC11MP_UART1 }
+#define PB11MP_UART2_IRQ       { IRQ_PB11MP_UART2 }
+#define PB11MP_UART3_IRQ       { IRQ_PB11MP_UART3 }
+#define PB11MP_SSP_IRQ         { IRQ_PB11MP_SSP }
 
 /* FPGA Primecells */
 AMBA_DEVICE(aaci,      "fpga:aaci",    AACI,           NULL);
index 25b2e59296f8d7a5721595f2523b152e69a0034e..293de2155ca7e7e6c1db05b1ad0aad14607d3631 100644 (file)
@@ -122,27 +122,27 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PBA8Core AMBA devices
  */
 
-#define GPIO2_IRQ              { IRQ_PBA8_GPIO2, NO_IRQ }
-#define GPIO3_IRQ              { IRQ_PBA8_GPIO3, NO_IRQ }
-#define AACI_IRQ               { IRQ_PBA8_AACI, NO_IRQ }
+#define GPIO2_IRQ              { IRQ_PBA8_GPIO2 }
+#define GPIO3_IRQ              { IRQ_PBA8_GPIO3 }
+#define AACI_IRQ               { IRQ_PBA8_AACI }
 #define MMCI0_IRQ              { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
-#define KMI0_IRQ               { IRQ_PBA8_KMI0, NO_IRQ }
-#define KMI1_IRQ               { IRQ_PBA8_KMI1, NO_IRQ }
-#define PBA8_SMC_IRQ           { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ               { NO_IRQ, NO_IRQ }
-#define PBA8_CLCD_IRQ          { IRQ_PBA8_CLCD, NO_IRQ }
-#define DMAC_IRQ               { IRQ_PBA8_DMAC, NO_IRQ }
-#define SCTL_IRQ               { NO_IRQ, NO_IRQ }
-#define PBA8_WATCHDOG_IRQ      { IRQ_PBA8_WATCHDOG, NO_IRQ }
-#define PBA8_GPIO0_IRQ         { IRQ_PBA8_GPIO0, NO_IRQ }
-#define GPIO1_IRQ              { IRQ_PBA8_GPIO1, NO_IRQ }
-#define PBA8_RTC_IRQ           { IRQ_PBA8_RTC, NO_IRQ }
-#define SCI_IRQ                        { IRQ_PBA8_SCI, NO_IRQ }
-#define PBA8_UART0_IRQ         { IRQ_PBA8_UART0, NO_IRQ }
-#define PBA8_UART1_IRQ         { IRQ_PBA8_UART1, NO_IRQ }
-#define PBA8_UART2_IRQ         { IRQ_PBA8_UART2, NO_IRQ }
-#define PBA8_UART3_IRQ         { IRQ_PBA8_UART3, NO_IRQ }
-#define PBA8_SSP_IRQ           { IRQ_PBA8_SSP, NO_IRQ }
+#define KMI0_IRQ               { IRQ_PBA8_KMI0 }
+#define KMI1_IRQ               { IRQ_PBA8_KMI1 }
+#define PBA8_SMC_IRQ           { }
+#define MPMC_IRQ               { }
+#define PBA8_CLCD_IRQ          { IRQ_PBA8_CLCD }
+#define DMAC_IRQ               { IRQ_PBA8_DMAC }
+#define SCTL_IRQ               { }
+#define PBA8_WATCHDOG_IRQ      { IRQ_PBA8_WATCHDOG }
+#define PBA8_GPIO0_IRQ         { IRQ_PBA8_GPIO0 }
+#define GPIO1_IRQ              { IRQ_PBA8_GPIO1 }
+#define PBA8_RTC_IRQ           { IRQ_PBA8_RTC }
+#define SCI_IRQ                        { IRQ_PBA8_SCI }
+#define PBA8_UART0_IRQ         { IRQ_PBA8_UART0 }
+#define PBA8_UART1_IRQ         { IRQ_PBA8_UART1 }
+#define PBA8_UART2_IRQ         { IRQ_PBA8_UART2 }
+#define PBA8_UART3_IRQ         { IRQ_PBA8_UART3 }
+#define PBA8_SSP_IRQ           { IRQ_PBA8_SSP }
 
 /* FPGA Primecells */
 AMBA_DEVICE(aaci,      "fpga:aaci",    AACI,           NULL);
index ac715645b8606aeee172fee74ee555823881b009..8e2a306308567624f047c1192d33ec533b662b7b 100644 (file)
@@ -144,27 +144,27 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PBXCore AMBA devices
  */
 
-#define GPIO2_IRQ              { IRQ_PBX_GPIO2, NO_IRQ }
-#define GPIO3_IRQ              { IRQ_PBX_GPIO3, NO_IRQ }
-#define AACI_IRQ               { IRQ_PBX_AACI, NO_IRQ }
+#define GPIO2_IRQ              { IRQ_PBX_GPIO2 }
+#define GPIO3_IRQ              { IRQ_PBX_GPIO3 }
+#define AACI_IRQ               { IRQ_PBX_AACI }
 #define MMCI0_IRQ              { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
-#define KMI0_IRQ               { IRQ_PBX_KMI0, NO_IRQ }
-#define KMI1_IRQ               { IRQ_PBX_KMI1, NO_IRQ }
-#define PBX_SMC_IRQ            { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ               { NO_IRQ, NO_IRQ }
-#define PBX_CLCD_IRQ           { IRQ_PBX_CLCD, NO_IRQ }
-#define DMAC_IRQ               { IRQ_PBX_DMAC, NO_IRQ }
-#define SCTL_IRQ               { NO_IRQ, NO_IRQ }
-#define PBX_WATCHDOG_IRQ       { IRQ_PBX_WATCHDOG, NO_IRQ }
-#define PBX_GPIO0_IRQ          { IRQ_PBX_GPIO0, NO_IRQ }
-#define GPIO1_IRQ              { IRQ_PBX_GPIO1, NO_IRQ }
-#define PBX_RTC_IRQ            { IRQ_PBX_RTC, NO_IRQ }
-#define SCI_IRQ                        { IRQ_PBX_SCI, NO_IRQ }
-#define PBX_UART0_IRQ          { IRQ_PBX_UART0, NO_IRQ }
-#define PBX_UART1_IRQ          { IRQ_PBX_UART1, NO_IRQ }
-#define PBX_UART2_IRQ          { IRQ_PBX_UART2, NO_IRQ }
-#define PBX_UART3_IRQ          { IRQ_PBX_UART3, NO_IRQ }
-#define PBX_SSP_IRQ            { IRQ_PBX_SSP, NO_IRQ }
+#define KMI0_IRQ               { IRQ_PBX_KMI0 }
+#define KMI1_IRQ               { IRQ_PBX_KMI1 }
+#define PBX_SMC_IRQ            { }
+#define MPMC_IRQ               { }
+#define PBX_CLCD_IRQ           { IRQ_PBX_CLCD }
+#define DMAC_IRQ               { IRQ_PBX_DMAC }
+#define SCTL_IRQ               { }
+#define PBX_WATCHDOG_IRQ       { IRQ_PBX_WATCHDOG }
+#define PBX_GPIO0_IRQ          { IRQ_PBX_GPIO0 }
+#define GPIO1_IRQ              { IRQ_PBX_GPIO1 }
+#define PBX_RTC_IRQ            { IRQ_PBX_RTC }
+#define SCI_IRQ                        { IRQ_PBX_SCI }
+#define PBX_UART0_IRQ          { IRQ_PBX_UART0 }
+#define PBX_UART1_IRQ          { IRQ_PBX_UART1 }
+#define PBX_UART2_IRQ          { IRQ_PBX_UART2 }
+#define PBX_UART3_IRQ          { IRQ_PBX_UART3 }
+#define PBX_SSP_IRQ            { IRQ_PBX_SSP }
 
 /* FPGA Primecells */
 AMBA_DEVICE(aaci,      "fpga:aaci",    AACI,           NULL);
index 02b7b9303f3bd77c36f6e976cfa39cd8b6f81eb9..358cc0bc069bdd4520d14cb5cb2a13210f22e91b 100644 (file)
@@ -582,36 +582,36 @@ static struct pl022_ssp_controller ssp0_plat_data = {
        .num_chipselect = 1,
 };
 
-#define AACI_IRQ       { IRQ_AACI, NO_IRQ }
+#define AACI_IRQ       { IRQ_AACI }
 #define MMCI0_IRQ      { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
-#define KMI0_IRQ       { IRQ_SIC_KMI0, NO_IRQ }
-#define KMI1_IRQ       { IRQ_SIC_KMI1, NO_IRQ }
+#define KMI0_IRQ       { IRQ_SIC_KMI0 }
+#define KMI1_IRQ       { IRQ_SIC_KMI1 }
 
 /*
  * These devices are connected directly to the multi-layer AHB switch
  */
-#define SMC_IRQ                { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ       { NO_IRQ, NO_IRQ }
-#define CLCD_IRQ       { IRQ_CLCDINT, NO_IRQ }
-#define DMAC_IRQ       { IRQ_DMAINT, NO_IRQ }
+#define SMC_IRQ                { }
+#define MPMC_IRQ       { }
+#define CLCD_IRQ       { IRQ_CLCDINT }
+#define DMAC_IRQ       { IRQ_DMAINT }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define SCTL_IRQ       { NO_IRQ, NO_IRQ }
-#define WATCHDOG_IRQ   { IRQ_WDOGINT, NO_IRQ }
-#define GPIO0_IRQ      { IRQ_GPIOINT0, NO_IRQ }
-#define GPIO1_IRQ      { IRQ_GPIOINT1, NO_IRQ }
-#define RTC_IRQ                { IRQ_RTCINT, NO_IRQ }
+#define SCTL_IRQ       { }
+#define WATCHDOG_IRQ   { IRQ_WDOGINT }
+#define GPIO0_IRQ      { IRQ_GPIOINT0 }
+#define GPIO1_IRQ      { IRQ_GPIOINT1 }
+#define RTC_IRQ                { IRQ_RTCINT }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
-#define SCI_IRQ                { IRQ_SCIINT, NO_IRQ }
-#define UART0_IRQ      { IRQ_UARTINT0, NO_IRQ }
-#define UART1_IRQ      { IRQ_UARTINT1, NO_IRQ }
-#define UART2_IRQ      { IRQ_UARTINT2, NO_IRQ }
-#define SSP_IRQ                { IRQ_SSPINT, NO_IRQ }
+#define SCI_IRQ                { IRQ_SCIINT }
+#define UART0_IRQ      { IRQ_UARTINT0 }
+#define UART1_IRQ      { IRQ_UARTINT1 }
+#define UART2_IRQ      { IRQ_UARTINT2 }
+#define SSP_IRQ                { IRQ_SSPINT }
 
 /* FPGA Primecells */
 AMBA_DEVICE(aaci,  "fpga:04", AACI,     NULL);
index 9581c197500cefbadfb6f194e506ade53dd9b6a1..1a5fe6eec3374ff3854a5576550a8190010ecfd4 100644 (file)
@@ -58,15 +58,15 @@ static struct pl061_platform_data gpio3_plat_data = {
        .irq_base       = IRQ_GPIO3_START,
 };
 
-#define UART3_IRQ      { IRQ_SIC_UART3, NO_IRQ }
-#define SCI1_IRQ       { IRQ_SIC_SCI3, NO_IRQ }
+#define UART3_IRQ      { IRQ_SIC_UART3 }
+#define SCI1_IRQ       { IRQ_SIC_SCI3 }
 #define MMCI1_IRQ      { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define GPIO2_IRQ      { IRQ_GPIOINT2, NO_IRQ }
-#define GPIO3_IRQ      { IRQ_GPIOINT3, NO_IRQ }
+#define GPIO2_IRQ      { IRQ_GPIOINT2 }
+#define GPIO3_IRQ      { IRQ_GPIOINT3 }
 
 /*
  * These devices are connected via the DMA APB bridge
index a34d3d4faae19c264d34372c09a11b8b274b219c..a40468f3b938f28fdeb4f10f5b94663e11015a05 100644 (file)
@@ -35,7 +35,7 @@
  * Interrupts.  Those in {} are for AMBA devices
  */
 #define IRQ_CT_CA9X4_CLCDC     { 76 }
-#define IRQ_CT_CA9X4_DMC       { -1 }
+#define IRQ_CT_CA9X4_DMC       { 0 }
 #define IRQ_CT_CA9X4_SMC       { 77, 78 }
 #define IRQ_CT_CA9X4_TIMER0    80
 #define IRQ_CT_CA9X4_TIMER1    81