(clock and power control, etc).
config ARCH_SHMOBILE_LEGACY
- bool "Renesas SH-Mobile / R-Mobile (non-multiplatform)"
+ bool "Renesas ARM SoCs (non-multiplatform)"
select ARCH_SHMOBILE
select ARM_PATCH_PHYS_VIRT
select CLKDEV_LOOKUP
select PM_GENERIC_DOMAINS if PM
select SPARSE_IRQ
help
- Support for Renesas's SH-Mobile and R-Mobile ARM platforms using
- a non-multiplatform kernel.
+ Support for Renesas ARM SoC platforms using a non-multiplatform
+ kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
+ and RZ families.
config ARCH_RPC
bool "RiscPC"
bool
config ARCH_SHMOBILE_MULTI
- bool "SH-Mobile Series" if ARCH_MULTI_V7
+ bool "Renesas ARM SoCs" if ARCH_MULTI_V7
depends on MMU
select ARCH_SHMOBILE
select CPU_V7
if ARCH_SHMOBILE_MULTI
-comment "SH-Mobile System Type"
+comment "Renesas ARM SoCs System Type"
config ARCH_EMEV2
bool "Emma Mobile EV2"
bool "R-Car M2 (R8A77910)"
select RENESAS_IRQC
-comment "SH-Mobile Board Type"
+comment "Renesas ARM SoCs Board Type"
config MACH_GENMAI
bool "Genmai board"
depends on ARCH_EMEV2
select REGULATOR_FIXED_VOLTAGE if REGULATOR
-comment "SH-Mobile System Configuration"
+comment "Renesas ARM SoCs System Configuration"
endif
if ARCH_SHMOBILE_LEGACY
-comment "SH-Mobile System Type"
+comment "Renesas ARM SoCs System Type"
config ARCH_SH7372
bool "SH-Mobile AP4 (SH7372)"
select CPU_V7
select SH_CLK_CPG
-comment "SH-Mobile Board Type"
+comment "Renesas ARM SoCs Board Type"
config MACH_APE6EVM
bool "APE6EVM board"
This is intended to aid developers
-comment "SH-Mobile System Configuration"
+comment "Renesas ARM SoCs System Configuration"
config CPU_HAS_INTEVT
bool
Allows the configuration of the timer frequency. It is customary
to have the timer interrupt run at 1000 Hz or 100 Hz, but in the
case of low timer frequencies other values may be more suitable.
- SH-Mobile systems using a 32768 Hz RCLK for clock events may want
- to select a HZ value such as 128 that can evenly divide RCLK.
+ Renesas ARM SoC systems using a 32768 Hz RCLK for clock events may
+ want to select a HZ value such as 128 that can evenly divide RCLK.
A HZ value that does not divide evenly may cause timer drift.
config SH_TIMER_CMT