#define bcm_perf_enable()
#define bcmstats(fmt)
#define bcmlog(fmt, a1, a2)
-#define bcmdumplog(buf, size) *buf = '\0'
+#define bcmdumplog(buf, size) (*buf = '\0')
#define bcmdumplogent(buf, idx) -1
#define bcmtslog(tstamp, fmt, a1, a2)
#define ALIGN_ADDR(addr, boundary) (void *)(((uintptr)(addr) + (boundary) - 1) \
& ~((boundary) - 1))
#define ISPOWEROF2(x) ((((x)-1)&(x)) == 0)
-#define VALID_MASK(mask) !((mask) & ((mask) + 1))
+#define VALID_MASK(mask) (!((mask) & ((mask) + 1)))
#ifndef OFFSETOF
#define OFFSETOF(type, member) ((uint)(uintptr)&((type *)0)->member)
#endif /* OFFSETOF */
#define EPI_BUILD_NUMBER 1
-#define EPI_VERSION 5, 75, 11, 0
+#define EPI_VERSION { 5, 75, 11, 0 }
#ifdef BCMSDIO
/* EPI_VERSION_NUM must match FW version */
#endif /* !defined(CONFIG_MMC_MSM7X00A */
#define REG_UNMAP(va) iounmap((va))
-#define R_SM(r) *(r)
+#define R_SM(r) (*(r))
#define W_SM(r, v) (*(r) = (v))
#define BZERO_SM(r, len) memset((r), '\0', (len))
#define PKTPUSH(skb, bytes) skb_push((struct sk_buff*)(skb), (bytes))
#define PKTPULL(skb, bytes) skb_pull((struct sk_buff*)(skb), (bytes))
#define PKTTAG(skb) ((void*)(((struct sk_buff*)(skb))->cb))
-#define PKTALLOCED(osh) ((osl_pubinfo_t *)(osh))->pktalloced
+#define PKTALLOCED(osh) (((osl_pubinfo_t *)(osh))->pktalloced)
#define PKTSETPOOL(osh, skb, x, y) do {} while (0)
#define PKTPOOL(osh, skb) FALSE
-#define PKTUNALLOC(osh) ((osl_pubinfo_t *)(osh))->pktalloced--
+#define PKTUNALLOC(osh) (((osl_pubinfo_t *)(osh))->pktalloced--)
#define PKTSETSKIPCT(osh, skb)
#define PKTCLRSKIPCT(osh, skb)
#define AMPDU_RX_FACTOR_16K 1
#define AMPDU_RX_FACTOR_32K 2
#define AMPDU_RX_FACTOR_64K 3
-#define AMPDU_RX_FACTOR_BASE 8*1024
+#define AMPDU_RX_FACTOR_BASE (8*1024)
#define AMPDU_DELIMITER_LEN 4
#define CCTRL4331_EXT_LNA (1<<2) /* 0 disable */
#define CCTRL4331_SPROM_GPIO13_15 (1<<3) /* sprom/gpio13-15 mux */
#define CCTRL4331_EXTPA_EN (1<<4) /* 0 ext pa disable, 1 ext pa enabled */
-#define CCTRL4331_GPIOCLK_ON_SPROMCS <1<<5) /* set drive out GPIO_CLK on sprom_cs pin */
+#define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) /* set drive out GPIO_CLK on sprom_cs pin */
#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) /* use sprom_cs pin as PCIE mdio interface */
#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) /* aband extpa will be at gpio2/5 and sprom_dout */
#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) /* override core control on pipe_AuxClkEnable */
#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) /* override core control on pipe_AuxPowerDown */
-#define CCTRL4331_PCIE_AUXCLKEN <1<<10) /* pcie_auxclkenable */
-#define CCTRL4331_PCIE_PIPE_PLLDOWN <1<<11) /* pcie_pipe_pllpowerdown */
-#define CCTRL4331_BT_SHD0_ON_GPIO4 <1<<16) /* enable bt_shd0 at gpio4 */
-#define CCTRL4331_BT_SHD1_ON_GPIO5 <1<<17) /* enable bt_shd1 at gpio5 */
+#define CCTRL4331_PCIE_AUXCLKEN (1<<10) /* pcie_auxclkenable */
+#define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) /* pcie_pipe_pllpowerdown */
+#define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) /* enable bt_shd0 at gpio4 */
+#define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) /* enable bt_shd1 at gpio5 */
/* 4331 Chip specific ChipStatus register bits */
#define CST4331_XTAL_FREQ 0x00000001 /* crystal frequency 20/40Mhz */
#define PHY_BUILD_NUMBER 0
-#define PHY_VERSION 1, 82, 8, 0
+#define PHY_VERSION { 1, 82, 8, 0 }
#define PHY_VERSION_NUM 0x01520800
#define RDR_NTIERS 1
#define RDR_TIER_SIZE 64
-#define RDR_LIST_SIZE 512/3
+#define RDR_LIST_SIZE (512/3)
#define RDR_EPOCH_SIZE 40
#define RDR_NANTENNAS 2
#define RDR_NTIER_SIZE RDR_LIST_SIZE
#define WL_MAGIC 0xdeadbeef
-#define HW_TO_WL(hw) hw->priv
-#define WL_TO_HW(wl) wl->pub->ieee_hw
+#define HW_TO_WL(hw) (hw->priv)
+#define WL_TO_HW(wl) (wl->pub->ieee_hw)
#ifdef WLC_HIGH_ONLY
static int wl_ops_tx_nl(struct ieee80211_hw *hw, struct sk_buff *skb);
#else
* accumulate between resets.
*/
-#define TX_SEQ_TO_INDEX(seq) (seq) % AMPDU_TX_BA_MAX_WSIZE
+#define TX_SEQ_TO_INDEX(seq) ((seq) % AMPDU_TX_BA_MAX_WSIZE)
/* max possible overhead per mpdu in the ampdu; 3 is for roundup if needed */
#define AMPDU_MAX_MPDU_OVERHEAD (DOT11_FCS_LEN + DOT11_ICV_AES_LEN + AMPDU_DELIMITER_LEN + 3 \
#define LOCALE_CHAN_52_140_ALL (1<<14)
#define LOCALE_SET_5G_HIGH4 (1<<15) /* 184-216 */
-#define LOCALE_CHAN_36_64 LOCALE_SET_5G_LOW1 | LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3
-#define LOCALE_CHAN_52_64 LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3
-#define LOCALE_CHAN_100_124 LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2
+#define LOCALE_CHAN_36_64 (LOCALE_SET_5G_LOW1 | LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3)
+#define LOCALE_CHAN_52_64 (LOCALE_SET_5G_LOW2 | LOCALE_SET_5G_LOW3)
+#define LOCALE_CHAN_100_124 (LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2)
#define LOCALE_CHAN_100_140 \
- LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2 | LOCALE_SET_5G_MID3 | LOCALE_SET_5G_HIGH1
-#define LOCALE_CHAN_149_165 LOCALE_SET_5G_HIGH2 | LOCALE_SET_5G_HIGH3
+ (LOCALE_SET_5G_MID1 | LOCALE_SET_5G_MID2 | LOCALE_SET_5G_MID3 | LOCALE_SET_5G_HIGH1)
+#define LOCALE_CHAN_149_165 (LOCALE_SET_5G_HIGH2 | LOCALE_SET_5G_HIGH3)
#define LOCALE_CHAN_184_216 LOCALE_SET_5G_HIGH4
#define LOCALE_CHAN_01_14 (LOCALE_CHAN_01_11 | LOCALE_CHAN_12_13 | LOCALE_CHAN_14)
#define WLC_WME_RETRY_LFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LFB)
#define WLC_WME_RETRY_SHORT_SET(wlc, ac, val) \
- wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SHORT, val)
+ (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SHORT, val))
#define WLC_WME_RETRY_SFB_SET(wlc, ac, val) \
- wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SFB, val)
+ (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SFB, val))
#define WLC_WME_RETRY_LONG_SET(wlc, ac, val) \
- wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LONG, val)
+ (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LONG, val))
#define WLC_WME_RETRY_LFB_SET(wlc, ac, val) \
- wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LFB, val)
+ (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LFB, val))
/* PLL requests */
#define WLC_PLLREQ_SHARED 0x1 /* pll is shared on old chips */
#define SCB_BSSCFG(a) ((a)->bsscfg)
-#define SCB_SEQNUM(scb, prio) (scb)->seqnum[(prio)]
+#define SCB_SEQNUM(scb, prio) ((scb)->seqnum[(prio)])
#define SCB_ISMULTI(a) ETHER_ISMULTI((a)->ea.octet)
#define SCB_ISVALID(a, _pkttag_dbgid) ((a) && (a)->_dbgid == (_pkttag_dbgid))
};
#define CRC_INNER_LOOP(n, c, x) \
- (c) = ((c) >> 8) ^ crc##n##_table[((c) ^ (x)) & 0xff]
+ ((c) = ((c) >> 8) ^ crc##n##_table[((c) ^ (x)) & 0xff])
uint8 BCMROMFN(hndcrc8) (uint8 *pdata, /* pointer to array of data to process */
uint nbytes, /* number of input data bytes to process */