if (tscadc->adc_waiting)
wake_up(&tscadc->reg_se_wait);
else if (!tscadc->adc_in_use)
- regmap_write(tscadc->regmap_tscadc, REG_SE, tscadc->reg_se_cache);
+ regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
spin_unlock_irqrestore(&tscadc->reg_lock, flags);
}
DEFINE_WAIT(wait);
u32 reg;
- regmap_read(tscadc->regmap_tscadc, REG_ADCFSM, ®);
+ regmap_read(tscadc->regmap, REG_ADCFSM, ®);
if (reg & SEQ_STATUS) {
tscadc->adc_waiting = true;
prepare_to_wait(&tscadc->reg_se_wait, &wait,
* Sequencer should either be idle or
* busy applying the charge step.
*/
- regmap_read(tscadc->regmap_tscadc, REG_ADCFSM, ®);
+ regmap_read(tscadc->regmap, REG_ADCFSM, ®);
WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
tscadc->adc_waiting = false;
}
spin_lock_irq(&tscadc->reg_lock);
am335x_tscadc_need_adc(tscadc);
- regmap_write(tscadc->regmap_tscadc, REG_SE, val);
+ regmap_write(tscadc->regmap, REG_SE, val);
spin_unlock_irq(&tscadc->reg_lock);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
spin_lock_irqsave(&tscadc->reg_lock, flags);
tscadc->adc_in_use = false;
- regmap_write(tscadc->regmap_tscadc, REG_SE, tscadc->reg_se_cache);
+ regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
spin_unlock_irqrestore(&tscadc->reg_lock, flags);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
spin_lock_irqsave(&tscadc->reg_lock, flags);
tscadc->reg_se_cache &= ~val;
- regmap_write(tscadc->regmap_tscadc, REG_SE, tscadc->reg_se_cache);
+ regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
spin_unlock_irqrestore(&tscadc->reg_lock, flags);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
- regmap_write(tscadc->regmap_tscadc, REG_IDLECONFIG, idleconfig);
+ regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
}
static int ti_tscadc_probe(struct platform_device *pdev)
if (IS_ERR(tscadc->tscadc_base))
return PTR_ERR(tscadc->tscadc_base);
- tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
+ tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
tscadc->tscadc_base, &tscadc_regmap_config);
- if (IS_ERR(tscadc->regmap_tscadc)) {
+ if (IS_ERR(tscadc->regmap)) {
dev_err(&pdev->dev, "regmap init failed\n");
- err = PTR_ERR(tscadc->regmap_tscadc);
+ err = PTR_ERR(tscadc->regmap);
goto ret;
}
/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
tscadc->clk_div--;
- regmap_write(tscadc->regmap_tscadc, REG_CLKDIV, tscadc->clk_div);
+ regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
/* Set the control register bits */
ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
- regmap_write(tscadc->regmap_tscadc, REG_CTRL, ctrl);
+ regmap_write(tscadc->regmap, REG_CTRL, ctrl);
/* Set register bits for Idle Config Mode */
if (tsc_wires > 0) {
/* Enable the TSC module enable bit */
ctrl |= CNTRLREG_TSCSSENB;
- regmap_write(tscadc->regmap_tscadc, REG_CTRL, ctrl);
+ regmap_write(tscadc->regmap, REG_CTRL, ctrl);
tscadc->used_cells = 0;
tscadc->tsc_cell = -1;
{
struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
- regmap_write(tscadc->regmap_tscadc, REG_SE, 0x00);
+ regmap_write(tscadc->regmap, REG_SE, 0x00);
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
{
struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
- regmap_write(tscadc->regmap_tscadc, REG_SE, 0x00);
+ regmap_write(tscadc->regmap, REG_SE, 0x00);
pm_runtime_put_sync(dev);
return 0;
/* context restore */
ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
- regmap_write(tscadc->regmap_tscadc, REG_CTRL, ctrl);
+ regmap_write(tscadc->regmap, REG_CTRL, ctrl);
if (tscadc->tsc_cell != -1) {
if (tscadc->tsc_wires == 5)
tscadc_idle_config(tscadc);
}
ctrl |= CNTRLREG_TSCSSENB;
- regmap_write(tscadc->regmap_tscadc, REG_CTRL, ctrl);
+ regmap_write(tscadc->regmap, REG_CTRL, ctrl);
- regmap_write(tscadc->regmap_tscadc, REG_CLKDIV, tscadc->clk_div);
+ regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
return 0;
}