irqchip/gic-v3-its: Report that effective affinity is a single target
authorMarc Zyngier <marc.zyngier@arm.com>
Fri, 18 Aug 2017 08:39:18 +0000 (09:39 +0100)
committerThomas Gleixner <tglx@linutronix.de>
Fri, 18 Aug 2017 08:54:40 +0000 (10:54 +0200)
The GICv3 ITS driver only targets a single CPU at a time, even if
the notional affinity is wider. Let's inform the core code
about this.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Cc: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: http://lkml.kernel.org/r/20170818083925.10108-6-marc.zyngier@arm.com
drivers/irqchip/irq-gic-v3-its.c

index 68932873eebc0c3d14caa00b048d0c961e765a98..22e228500357e35f1dc5ecab0f4da0c8893e7112 100644 (file)
@@ -649,6 +649,7 @@ static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
                target_col = &its_dev->its->collections[cpu];
                its_send_movi(its_dev, target_col, id);
                its_dev->event_map.col_map[id] = cpu;
+               irq_data_update_effective_affinity(d, cpumask_of(cpu));
        }
 
        return IRQ_SET_MASK_OK_DONE;
@@ -1481,6 +1482,7 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
 
                irq_domain_set_hwirq_and_chip(domain, virq + i,
                                              hwirq, &its_irq_chip, its_dev);
+               irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i)));
                pr_debug("ID:%d pID:%d vID:%d\n",
                         (int)(hwirq - its_dev->event_map.lpi_base),
                         (int) hwirq, virq + i);
@@ -1495,13 +1497,16 @@ static void its_irq_domain_activate(struct irq_domain *domain,
        struct its_device *its_dev = irq_data_get_irq_chip_data(d);
        u32 event = its_get_event_id(d);
        const struct cpumask *cpu_mask = cpu_online_mask;
+       int cpu;
 
        /* get the cpu_mask of local node */
        if (its_dev->its->numa_node >= 0)
                cpu_mask = cpumask_of_node(its_dev->its->numa_node);
 
        /* Bind the LPI to the first possible CPU */
-       its_dev->event_map.col_map[event] = cpumask_first(cpu_mask);
+       cpu = cpumask_first(cpu_mask);
+       its_dev->event_map.col_map[event] = cpu;
+       irq_data_update_effective_affinity(d, cpumask_of(cpu));
 
        /* Map the GIC IRQ and event to the device */
        its_send_mapti(its_dev, d->hwirq, event);