drm/amdgpu: Show gpu load when display gpu performance for Fiji of VI.
authorRex Zhu <Rex.Zhu@amd.com>
Wed, 6 Jan 2016 09:15:59 +0000 (17:15 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 8 Jan 2016 20:39:25 +0000 (15:39 -0500)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c

index 3f3009d6b6e098056bf5e366627e581f6ecc24a4..28031a7eddba6cbb524066bd8277536da7533907 100644 (file)
@@ -4866,7 +4866,9 @@ static int fiji_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low)
 static void fiji_print_current_perforce_level(
                struct pp_hwmgr *hwmgr, struct seq_file *m)
 {
-       uint32_t sclk, mclk;
+       uint32_t sclk, mclk, activity_percent = 0;
+       uint32_t offset;
+       struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
 
        smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_API_GetSclkFrequency);
 
@@ -4877,6 +4879,13 @@ static void fiji_print_current_perforce_level(
        mclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);
        seq_printf(m, "\n [  mclk  ]: %u MHz\n\n [  sclk  ]: %u MHz\n",
                        mclk / 100, sclk / 100);
+
+       offset = data->soft_regs_start + offsetof(SMU73_SoftRegisters, AverageGraphicsActivity);
+       activity_percent = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset);
+       activity_percent += 0x80;
+       activity_percent >>= 8;
+
+       seq_printf(m, "\n [GPU load]: %u%%\n\n", activity_percent > 100 ? 100 : activity_percent);
 }
 
 static int fiji_program_display_gap(struct pp_hwmgr *hwmgr)