-#define DEBUG
/*
* pxa-ssp.c -- ALSA Soc Audio Layer
*
sscr0 |= SSCR0_PSP;
sscr1 |= SSCR1_RWOT | SSCR1_TRAIL;
+ /* See hw_params() */
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_NF:
+ sspsp |= SSPSP_SFRMP;
break;
case SND_SOC_DAIFMT_NB_IF:
- sspsp |= SSPSP_SFRMP;
break;
case SND_SOC_DAIFMT_IB_IF:
- sspsp |= SSPSP_SFRMP | SSPSP_SCMODE(3);
+ sspsp |= SSPSP_SCMODE(3);
break;
default:
return -EINVAL;
#else
return -EINVAL;
#endif
- } else
- sspsp |= SSPSP_SFRMWDTH(width);
+ } else {
+ /* The frame width is the width the LRCLK is
+ * asserted for; the delay is expressed in
+ * half cycle units. We need the extra cycle
+ * because the data starts clocking out one BCLK
+ * after LRCLK changes polarity.
+ */
+ sspsp |= SSPSP_SFRMWDTH(width + 1);
+ sspsp |= SSPSP_SFRMDLY((width + 1) * 2);
+ sspsp |= SSPSP_DMYSTRT(1);
+ }
ssp_write_reg(ssp, SSPSP, sspsp);
break;